Assignee
AMPERE COMPUTING LLC
US72 patents
Top patents by PatentIndex Score
US10348281B1Jul 9, 2019
Clock control based on voltage associated with a microprocessor
AMPERE COMPUTING LLC20 citations93
US12204410B2Jan 21, 2025
Integrated error correction code (ECC) and parity protection in memory control circuits for increased memory utilization
AMPERE COMPUTING LLC14 citations85
US10162373B1Dec 25, 2018
Variation immune on-die voltage droop detector
AMPERE COMPUTING LLC11 citations84
US10145868B2Dec 4, 2018
Self-referenced on-die voltage droop detector
AMPERE COMPUTING LLC7 citations84
US10318696B1Jun 11, 2019
Efficient techniques for process variation reduction for static timing analysis
AMPERE COMPUTING LLC7 citations77
US10372615B1Aug 6, 2019
Data management for cache memory
AMPERE COMPUTING LLC3 citations73
US10210096B2Feb 19, 2019
Multi-stage address translation for a computing device
AMPERE COMPUTING LLC2 citations73
US10191868B2Jan 29, 2019
Priority framework for a computing device
AMPERE COMPUTING LLC2 citations73
US11880686B2Jan 23, 2024
Devices transferring cache lines, including metadata on external links
AMPERE COMPUTING LLC2 citations72
US9971693B2May 15, 2018
Prefetch tag for eviction promotion
AMPERE COMPUTING LLC2 citations72
US12007896B2Jun 11, 2024
Apparatuses, systems, and methods for configuring combined private and shared cache levels in a processor-based system
AMPERE COMPUTING LLC3 citations69
US12019565B2Jun 25, 2024
Advanced initialization bus (AIB)
AMPERE COMPUTING LLC4 citations68
US10205666B2Feb 12, 2019
End-to-end flow control in system on chip interconnects
AMPERE COMPUTING LLC2 citations68
US9965419B1May 8, 2018
Multiple-queue integer coalescing mapping algorithm with shared based time
AMPERE COMPUTING LLC3 citations68
US10439960B1Oct 8, 2019
Memory page request for optimizing memory page latency associated with network nodes
AMPERE COMPUTING LLC2 citations67
US10318676B2Jun 11, 2019
Techniques for statistical frequency enhancement of statically timed designs
AMPERE COMPUTING LLC6 citations67
US11481270B1Oct 25, 2022
Method and system for sequencing data checks in a packet
AMPERE COMPUTING LLC2 citations65
US12423108B2Sep 23, 2025
Devices transferring cache lines, including metadata on external links
AMPERE COMPUTING LLC1 citations63
US11934834B2Mar 19, 2024
Instruction scheduling in a processor using operation source parent tracking
AMPERE COMPUTING LLC2 citations62
US12314130B2May 27, 2025
Parity protected memory blocks merged with error correction code (ECC) protected blocks in a codeword for increased memory utilization
AMPERE COMPUTING LLC0 citations61
US12241932B2Mar 4, 2025
Method and system for testing semiconductor circuits
AMPERE COMPUTING LLC0 citations61
US11934263B2Mar 19, 2024
Parity protected memory blocks merged with error correction code (ECC) protected blocks in a codeword for increased memory utilization
AMPERE COMPUTING LLC1 citations61
US11513798B1Nov 29, 2022
Implementation of load acquire/store release instructions using load/store operation with DMB operation
AMPERE COMPUTING LLC0 citations61
US10972390B2Apr 6, 2021
TCP segmentation offload in a server on a chip
AMPERE COMPUTING LLC0 citations60
US12474848B2Nov 18, 2025
Techniques for memory resource control using memory resource partitioning and monitoring
AMPERE COMPUTING LLC0 citations59
US11049854B1Jun 29, 2021
MIMCAP creation and utilization methodology
AMPERE COMPUTING LLC0 citations59
US12554640B2Feb 17, 2026
Apparatuses, systems, and methods for controlling cache allocations in a configurable combined private and shared cache in a processor-based system
AMPERE COMPUTING LLC0 citations57
US11947454B2Apr 2, 2024
Apparatuses, systems, and methods for controlling cache allocations in a configurable combined private and shared cache in a processor-based system
AMPERE COMPUTING LLC1 citations57
US11880306B2Jan 23, 2024
Apparatus, system, and method for configuring a configurable combined private and shared cache
AMPERE COMPUTING LLC1 citations57
US11586537B2Feb 21, 2023
Method, apparatus, and system for run-time checking of memory tags in a processor-based system
AMPERE COMPUTING LLC0 citations57
US12411778B2Sep 9, 2025
Advanced initialization bus (AIB)
AMPERE COMPUTING LLC0 citations56
US11822487B2Nov 21, 2023
Flexible storage and optimized search for multiple page sizes in a translation lookaside buffer
AMPERE COMPUTING LLC0 citations56
US11386016B2Jul 12, 2022
Flexible storage and optimized search for multiple page sizes in a translation lookaside buffer
AMPERE COMPUTING LLC0 citations56
US10819783B1Oct 27, 2020
Managing a data packet for an operating system associated with a multi-node system
AMPERE COMPUTING LLC1 citations56
US11966750B2Apr 23, 2024
System-on-chip management controller
AMPERE COMPUTING LLC0 citations55
US11868209B2Jan 9, 2024
Method and system for sequencing data checks in a packet
AMPERE COMPUTING LLC0 citations55
US10083131B2Sep 25, 2018
Generating and/or employing a descriptor associated with a memory translation table
AMPERE COMPUTING LLC2 citations55
US12549479B2Feb 10, 2026
Apparatus and method of routing a request in a mesh network
AMPERE COMPUTING LLC0 citations54
US12385975B1Aug 12, 2025
Integrated circuits including error protection of fields in transferred information and field-based error signals and related methods
AMPERE COMPUTING LLC0 citations54
US12058044B1Aug 6, 2024
Apparatus and method of routing a request in a mesh network
AMPERE COMPUTING LLC0 citations54
US11977638B2May 7, 2024
Low-impact firmware update
AMPERE COMPUTING LLC0 citations54
US12333001B2Jun 17, 2025
Mitigation of return stack buffer side channel attacks in a processor
AMPERE COMPUTING LLC0 citations53
US12093212B2Sep 17, 2024
External quiesce of a core in a multi-core system
AMPERE COMPUTING LLC0 citations53
US11507130B2Nov 22, 2022
Distributing a global counter value in a multi-socket system-on-chip complex
AMPERE COMPUTING LLC0 citations53
US12159056B2Dec 3, 2024
Extending functionality of memory controllers in a processor-based device
AMPERE COMPUTING LLC0 citations51
US10613984B2Apr 7, 2020
Prefetch tag for eviction promotion
AMPERE COMPUTING LLC0 citations51
US12175243B2Dec 24, 2024
Hardware micro-fused memory operations
AMPERE COMPUTING LLC1 citations50
US11093401B2Aug 17, 2021
Hazard prediction for a group of memory access instructions using a buffer associated with branch prediction
AMPERE COMPUTING LLC0 citations49
US11972288B2Apr 30, 2024
Apparatus, system, and method for multi-level instruction scheduling in a microprocessor
AMPERE COMPUTING LLC0 citations48
US9971617B2May 15, 2018
Virtual appliance on a chip
AMPERE COMPUTING LLC0 citations48
Showing the top 50 of 72 patents by PatentIndex Score.