Assignee
BIRAN GIORA
IL·18 granted patents·3 pending applications·149 citations·filing 2005–2012
Top patents by PatentIndex Score
21 records- 0195US9405550B2Methods for the transmission of accelerator commands and corresponding command structure to remote hardware accelerator engines over an interconnect linkBIRAN GIORA·Filed 2011·Granted Aug 2, 2016·35 cites·21 claims
- 0292US8139575B2Device, system and method of modification of PCI express packet digestBIRAN GIORA·Filed 2007·Granted Mar 20, 2012·54 cites·20 claims
- 0390US8593308B1Method of accelerating dynamic Huffman decompaction within the inflate algorithmBIRAN GIORA·Filed 2012·Granted Nov 26, 2013·14 cites·7 claims
- 0488US8402003B2Performance monitoring mechanism for use in a pattern matching acceleratorBIRAN GIORA·Filed 2011·Granted Mar 19, 2013·11 cites·27 claims
- 0574US8806292B2Method of hybrid compression acceleration utilizing special and general purpose processorsBIRAN GIORA·Filed 2011·Granted Aug 12, 2014·5 cites·24 claims
- 0673US8799188B2Algorithm engine for use in a pattern matching acceleratorBIRAN GIORA·Filed 2011·Granted Aug 5, 2014·7 cites·26 claims
- 0773US8495334B2Address translation for use in a pattern matching acceleratorBIRAN GIORA·Filed 2011·Granted Jul 23, 2013·3 cites·23 claims
- 0873US8447749B2Local results processor for use in a pattern matching acceleratorBIRAN GIORA·Filed 2011·Granted May 21, 2013·3 cites·25 claims
- 0973US8423533B2Multiple rule bank access scheme for use in a pattern matching acceleratorBIRAN GIORA·Filed 2011·Granted Apr 16, 2013·3 cites·22 claims
- 1068US8412722B2Upload manager for use in a pattern matching acceleratorBIRAN GIORA·Filed 2011·Granted Apr 2, 2013·2 cites·24 claims
- 1167US9037770B2Accelerator engine emulation over an interconnect linkBIRAN GIORA·Filed 2011·Granted May 19, 2015·2 cites·24 claims
- 1263US8966182B2Software and hardware managed dual rule bank cache for use in a pattern matching acceleratorBIRAN GIORA·Filed 2011·Granted Feb 24, 2015·1 cites·17 claims
- 1363US8838544B2Fast history based compression in a pipelined architectureBIRAN GIORA·Filed 2009·Granted Sep 16, 2014·2 cites·19 claims
- 1462US8635180B2Multiple hash scheme for use in a pattern matching acceleratorBIRAN GIORA·Filed 2011·Granted Jan 21, 2014·3 cites·27 claims
- 1562US8478736B2Pattern matching acceleratorBIRAN GIORA·Filed 2011·Granted Jul 2, 2013·2 cites·31 claims
- 1662US8438265B2Method of offloading iSCSI PDU corruption-detection digest generation from a host processing unit, and related iSCSI offload engineBIRAN GIORA·Filed 2005·Granted May 7, 2013·2 cites·18 claims
- 1752US8131881B2Completion coalescing by TCP receiverBIRAN GIORA·Filed 2007·Granted Mar 6, 2012·0 cites·21 claims
- 1848US2009271802A1Application and verb resource managementBIRAN GIORA·Filed 2008·Application pending·0 cites
- 1944US2007136554A1Memory operations in a virtualized systemBIRAN GIORA·Filed 2005·Application pending·0 cites
- 2042US2005265352A1Recovery from MSS changeBIRAN GIORA·Filed 2005·Application pending·0 cites
- 2140US8983891B2Pattern matching engine for use in a pattern matching acceleratorBIRAN GIORA·Filed 2011·Granted Mar 17, 2015·0 cites·31 claims
Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →