Assignee
BONILLA GRISELDA
US·11 granted patents·3 pending applications·54 citations·filing 2006–2012
Top patents by PatentIndex Score
14 records- 0193US9472450B2Graphene cap for copper interconnect structuresBONILLA GRISELDA·Filed 2012·Granted Oct 18, 2016·13 cites·5 claims
- 0293US8232646B2Interconnect structure for integrated circuits having enhanced electromigration resistanceBONILLA GRISELDA·Filed 2010·Granted Jul 31, 2012·17 cites·15 claims
- 0390US8623761B2Method of forming a graphene cap for copper interconnect structuresBONILLA GRISELDA·Filed 2012·Granted Jan 7, 2014·9 cites·10 claims
- 0485US8962467B2Metal fuse structure for improved programming capabilityBONILLA GRISELDA·Filed 2012·Granted Feb 24, 2015·6 cites·9 claims
- 0573US9034664B2Method to resolve hollow metal defects in interconnectsBONILLA GRISELDA·Filed 2012·Granted May 19, 2015·3 cites·8 claims
- 0668US8836124B2Fuse and integrated conductorBONILLA GRISELDA·Filed 2012·Granted Sep 16, 2014·2 cites·13 claims
- 0768US8809183B2Interconnect structure with a planar interface between a selective conductive cap and a dielectric cap layerBONILLA GRISELDA·Filed 2010·Granted Aug 19, 2014·2 cites·19 claims
- 0864US8298948B2Capping of copper interconnect lines in integrated circuit devicesBONILLA GRISELDA·Filed 2009·Granted Oct 30, 2012·2 cites·20 claims
- 0956US2009311859A1Method for enabling hard mask free integration of ultra low-k materials and structures produced therebyBONILLA GRISELDA·Filed 2009·Application pending·0 cites
- 1051US2007249156A1Method for enabling hard mask free integration of ultra low-k materials and structures produced therebyBONILLA GRISELDA·Filed 2007·Application pending·0 cites
- 1150US9059169B2E-fuse structures and methods of manufactureBONILLA GRISELDA·Filed 2011·Granted Jun 16, 2015·0 cites·18 claims
- 1246US8796133B2Optimization metallization for prevention of dielectric cracking under controlled collapse chip connectionsBONILLA GRISELDA·Filed 2012·Granted Aug 5, 2014·0 cites·24 claims
- 1343US2008090402A1Densifying surface of porous dielectric layer using gas cluster ion beamBONILLA GRISELDA·Filed 2006·Application pending·0 cites
- 1442US8421239B2Crenulated wiring structure and method for integrated circuit interconnectsBONILLA GRISELDA·Filed 2010·Granted Apr 16, 2013·0 cites·20 claims
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Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →