Assignee
CADENCE DESIGN SYSTEMS INC
US2,021 patents
Top patents by PatentIndex Score
US8001516B2Aug 16, 2011
Characterization and reduction of variation for integrated circuits
CADENCE DESIGN SYSTEMS INC138 citations99
US7962867B2Jun 14, 2011
Electronic design for integrated circuits based on process related variations
CADENCE DESIGN SYSTEMS INC206 citations99
US7712056B2May 4, 2010
Characterization and verification for integrated circuit designs
CADENCE DESIGN SYSTEMS INC194 citations99
US7480891B2Jan 20, 2009
Method and apparatus of model-based photomask synthesis
CADENCE DESIGN SYSTEMS INC248 citations99
US7393755B2Jul 1, 2008
Dummy fill for integrated circuits
CADENCE DESIGN SYSTEMS INC104 citations99
US7383521B2Jun 3, 2008
Characterization and reduction of variation for integrated circuits
CADENCE DESIGN SYSTEMS INC408 citations99
US7367008B2Apr 29, 2008
Adjustment of masks for integrated circuit fabrication
CADENCE DESIGN SYSTEMS INC286 citations99
US7360179B2Apr 15, 2008
Use of models in integrated circuit fabrication
CADENCE DESIGN SYSTEMS INC266 citations99
US6526555B1Feb 25, 2003
Method for layout and manufacture of gridless non manhattan semiconductor integrated circuits using compaction
CADENCE DESIGN SYSTEMS INC104 citations99
US6516455B1Feb 4, 2003
Partitioning placement method using diagonal cutlines
CADENCE DESIGN SYSTEMS INC127 citations99
US9223915B1Dec 29, 2015
Method, system, and computer program product for checking, verifying, or testing a multi-fabric electronic design spanning across multiple design fabrics
CADENCE DESIGN SYSTEMS INC39 citations98
US8001512B1Aug 16, 2011
Method and system for implementing context simulation
CADENCE DESIGN SYSTEMS INC66 citations98
US7568174B2Jul 28, 2009
Method for checking printability of a lithography target
CADENCE DESIGN SYSTEMS INC185 citations98
US7562323B1Jul 14, 2009
System, method and computer program product for handling small aggressors in signal integrity analysis
CADENCE DESIGN SYSTEMS INC208 citations98
US7418693B1Aug 26, 2008
System and method for analysis and transformation of layouts using situations
CADENCE DESIGN SYSTEMS INC72 citations98
US7363099B2Apr 22, 2008
Integrated circuit metrology
CADENCE DESIGN SYSTEMS INC71 citations98
US7353475B2Apr 1, 2008
Electronic design for integrated circuits based on process related variations
CADENCE DESIGN SYSTEMS INC63 citations98
US7325206B2Jan 29, 2008
Electronic design for integrated circuits based process related variations
CADENCE DESIGN SYSTEMS INC66 citations98
US7231628B2Jun 12, 2007
Method and system for context-specific mask inspection
CADENCE DESIGN SYSTEMS INC314 citations98
US7117468B1Oct 3, 2006
Layouts with routes with different spacings in different directions on the same layer, and method and apparatus for generating such layouts
CADENCE DESIGN SYSTEMS INC104 citations98
US7065731B2Jun 20, 2006
Removal of acute angles in a design layout
CADENCE DESIGN SYSTEMS INC201 citations98
US7010280B1Mar 7, 2006
Linear RF power amplifier and transmitter
CADENCE DESIGN SYSTEMS INC82 citations98
US6971076B2Nov 29, 2005
Method for estimating peak crosstalk noise based on separate crosstalk model
CADENCE DESIGN SYSTEMS INC192 citations98
US6711727B1Mar 23, 2004
Method and arrangement for layout and manufacture of gridless nonManhattan semiconductor integrated circuits
CADENCE DESIGN SYSTEMS INC91 citations98
US6701474B2Mar 2, 2004
System and method for testing integrated circuits
CADENCE DESIGN SYSTEMS INC85 citations98
US6622291B1Sep 16, 2003
Method and apparatus for physical budgeting during RTL floorplanning
CADENCE DESIGN SYSTEMS INC105 citations98
US6269467B1Jul 31, 2001
Block based design methodology
CADENCE DESIGN SYSTEMS INC203 citations98
US5838583ANov 17, 1998
Optimized placement and routing of datapaths
CADENCE DESIGN SYSTEMS INC312 citations98
US8365113B1Jan 29, 2013
Flow methodology for single pass parallel hierarchical timing closure of integrated circuit designs
CADENCE DESIGN SYSTEMS INC51 citations97
US7882471B1Feb 1, 2011
Timing and signal integrity analysis of integrated circuits with semiconductor process variations
CADENCE DESIGN SYSTEMS INC56 citations97
US7882456B2Feb 1, 2011
Optical lithography correction process
CADENCE DESIGN SYSTEMS INC150 citations97
US7774735B1Aug 10, 2010
Integrated circuit netlist migration
CADENCE DESIGN SYSTEMS INC245 citations97
US7653892B1Jan 26, 2010
System and method for implementing image-based design rules
CADENCE DESIGN SYSTEMS INC48 citations97
US7549134B1Jun 16, 2009
Method and system for performing crosstalk analysis
CADENCE DESIGN SYSTEMS INC196 citations97
US7506300B2Mar 17, 2009
Apparatus and method for breaking up and merging polygons
CADENCE DESIGN SYSTEMS INC232 citations97
US7359843B1Apr 15, 2008
Robust calculation of crosstalk delay change in integrated circuit design
CADENCE DESIGN SYSTEMS INC221 citations97
US7168005B2Jan 23, 2007
Programable multi-port memory BIST with compact microcode
CADENCE DESIGN SYSTEMS INC91 citations97
US7155440B1Dec 26, 2006
Hierarchical data processing
CADENCE DESIGN SYSTEMS INC69 citations97
US7073140B1Jul 4, 2006
Method and system for performing crosstalk analysis
CADENCE DESIGN SYSTEMS INC198 citations97
US6701306B1Mar 2, 2004
Methods and apparatus for manipulating polygons in a multidimensional space
CADENCE DESIGN SYSTEMS INC78 citations97
US6631504B2Oct 7, 2003
Hierarchical test circuit structure for chips with multiple circuit blocks
CADENCE DESIGN SYSTEMS INC122 citations97
US6625611B1Sep 23, 2003
Method and apparatus for representing multidimensional data
CADENCE DESIGN SYSTEMS INC86 citations97
US6229289B1May 8, 2001
Power converter mode transitioning method and apparatus
CADENCE DESIGN SYSTEMS INC220 citations97
US5604680AFeb 18, 1997
Virtual interface representation of hierarchical symbolic layouts
CADENCE DESIGN SYSTEMS INC106 citations97
US7818707B1Oct 19, 2010
Fast pattern matching
CADENCE DESIGN SYSTEMS INC36 citations96
US7784019B1Aug 24, 2010
Yield based retargeting for semiconductor design flow
CADENCE DESIGN SYSTEMS INC51 citations96
US7725859B1May 25, 2010
Methods and mechanisms for inserting metal fill data
CADENCE DESIGN SYSTEMS INC92 citations96
US7707542B1Apr 27, 2010
Creating a situation repository
CADENCE DESIGN SYSTEMS INC24 citations96
US7543262B2Jun 2, 2009
Analog layout module generator and method
CADENCE DESIGN SYSTEMS INC138 citations96
US7487475B1Feb 3, 2009
Systems, methods, and apparatus to perform statistical static timing analysis
CADENCE DESIGN SYSTEMS INC299 citations96
Showing the top 50 of 2,021 patents by PatentIndex Score.