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CHEN TONG
CA22 patents
Top patents by PatentIndex Score
US8810533B2Aug 19, 2014
Systems and methods for receiving gesture inputs spanning multiple input devices
CHEN TONG61 citations98
US8522225B2Aug 27, 2013
Rewriting branch instructions using branch stubs
CHEN TONG18 citations92
US8146064B2Mar 27, 2012
Dynamically controlling a prefetching range of a software controlled cache
CHEN TONG21 citations92
US8997071B2Mar 31, 2015
Optimized division of work among processors in a heterogeneous processing system
CHEN TONG7 citations84
US8782381B2Jul 15, 2014
Dynamically rewriting branch instructions in response to cache line eviction
CHEN TONG7 citations84
US8713548B2Apr 29, 2014
Rewriting branch instructions using branch stubs
CHEN TONG6 citations84
US8631225B2Jan 14, 2014
Dynamically rewriting branch instructions to directly target an instruction cache location
CHEN TONG7 citations84
US8561044B2Oct 15, 2013
Optimized code generation targeting a high locality software cache
CHEN TONG15 citations84
USD682414SMay 14, 2013
Microderm abrasion machine
CHEN TONG9 citations84
US8285670B2Oct 9, 2012
Dynamically maintaining coherency within live ranges of direct buffers
CHEN TONG7 citations84
US8516230B2Aug 20, 2013
SPE software instruction cache
CHEN TONG10 citations83
US9459851B2Oct 4, 2016
Arranging binary code based on call graph partitioning
CHEN TONG3 citations73
US8627051B2Jan 7, 2014
Dynamically rewriting branch instructions to directly target an instruction cache location
CHEN TONG5 citations73
US8776034B2Jul 8, 2014
Dynamically maintaining coherency within live ranges of direct buffers
CHEN TONG3 citations63
US9600253B2Mar 21, 2017
Arranging binary code based on call graph partitioning
CHEN TONG1 citations62
US8762968B2Jun 24, 2014
Prefetching irregular data references for software controlled caches
CHEN TONG2 citations62
US8281295B2Oct 2, 2012
Computer analysis and runtime coherency checking
CHEN TONG3 citations62
US8239841B2Aug 7, 2012
Prefetching irregular data references for software controlled caches
CHEN TONG5 citations62
US8214816B2Jul 3, 2012
Compiler implemented software cache in which non-aliased explicitly fetched data are excluded
CHEN TONG3 citations61
US8495307B2Jul 23, 2013
Target memory hierarchy specification in a multi-core computer processing system
CHEN TONG2 citations59
US12208747B2Jan 28, 2025
Navigation display assembly
CHEN TONG0 citations52
US8656142B2Feb 18, 2014
Managing multiple speculative assist threads at differing cache levels
CHEN TONG0 citations42