Assignee
CHEN YIRAN
US20 patents
Top patents by PatentIndex Score
US8296620B2Oct 23, 2012
Data devices including multiple error correction codes and methods of utilizing
CHEN YIRAN24 citations93
US8203899B2Jun 19, 2012
Memory cell with proportional current self-reference sensing
CHEN YIRAN20 citations92
US9128821B2Sep 8, 2015
Data updating in non-volatile memory
CHEN YIRAN12 citations84
US8966181B2Feb 24, 2015
Memory hierarchy with non-volatile filter and victim caches
CHEN YIRAN7 citations84
US8514605B2Aug 20, 2013
MRAM diode array and access method
CHEN YIRAN7 citations84
US8416615B2Apr 9, 2013
Transmission gate-based spin-transfer torque memory unit
CHEN YIRAN5 citations84
US8416614B2Apr 9, 2013
Spin-transfer torque memory non-destructive self-reference read method
CHEN YIRAN5 citations84
US8289746B2Oct 16, 2012
MRAM diode array and access method
CHEN YIRAN9 citations84
US8213215B2Jul 3, 2012
Resistive sense memory calibration for self-reference read method
CHEN YIRAN12 citations84
US8199563B2Jun 12, 2012
Transmission gate-based spin-transfer torque memory unit
CHEN YIRAN7 citations84
US8116123B2Feb 14, 2012
Spin-transfer torque memory non-destructive self-reference read method
CHEN YIRAN15 citations84
US8081504B2Dec 20, 2011
Computer memory device with status register
CHEN YIRAN11 citations84
US8526215B2Sep 3, 2013
Spatial correlation of reference cells in resistive memory array
CHEN YIRAN1 citations63
US8203862B2Jun 19, 2012
Voltage reference generation with selectable dummy regions
CHEN YIRAN2 citations63
US8154914B2Apr 10, 2012
Predictive thermal preconditioning and timing control for non-volatile memory cells
CHEN YIRAN2 citations63
US8139397B2Mar 20, 2012
Spatial correlation of reference cells in resistive memory array
CHEN YIRAN2 citations63
US8194437B2Jun 5, 2012
Computer memory device with multiple interfaces
CHEN YIRAN3 citations61
US8942035B2Jan 27, 2015
Non-sequential encoding scheme for multi-level cell (MLC) memory cells
CHEN YIRAN0 citations52
US8553454B2Oct 8, 2013
Predictive thermal preconditioning and timing control for non-volatile memory cells
CHEN YIRAN0 citations52
US8934281B2Jan 13, 2015
Bit set modes for a resistive sense memory cell array
CHEN YIRAN0 citations51