Assignee
CHERUKURI NAVEEN
US·6 granted patents·3 pending applications·40 citations·filing 2004–2012
Top patents by PatentIndex Score
9 records- 0186US8990506B2Replacing cache lines in a cache memory based at least in part on cache coherency state informationCHERUKURI NAVEEN·Filed 2009·Granted Mar 24, 2015·17 cites·20 claims
- 0285US8831666B2Link power savings with state retentionCHERUKURI NAVEEN·Filed 2009·Granted Sep 9, 2014·11 cites·21 claims
- 0384US9424191B2Scalable coherence for multi-core processorsCHERUKURI NAVEEN·Filed 2012·Granted Aug 23, 2016·9 cites·27 claims
- 0467US8683136B2Apparatus and method for improving data prefetching efficiency using history based prefetchingCHERUKURI NAVEEN·Filed 2010·Granted Mar 25, 2014·2 cites·27 claims
- 0549US8914541B2Dynamically modulating link widthCHERUKURI NAVEEN·Filed 2011·Granted Dec 16, 2014·0 cites·13 claims
- 0646US8204067B2Technique for lane virtualizationCHERUKURI NAVEEN·Filed 2004·Granted Jun 19, 2012·1 cites·37 claims
- 0745US2005262184A1Method and apparatus for interactively training links in a lockstep fashionCHERUKURI NAVEEN·Filed 2004·Application pending·0 cites
- 0845US2006041696A1Methods and apparatuses for the physical layer initialization of a link-based system interconnectCHERUKURI NAVEEN·Filed 2004·Application pending·0 cites
- 0945US2009254712A1Adaptive cache organization for chip multiprocessorsCHERUKURI NAVEEN·Filed 2008·Application pending·0 cites
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