Assignee
CHUNG JAEWOONG
US·19 granted patents·6 pending applications·257 citations·filing 2009–2012
Top patents by PatentIndex Score
25 records- 0197USD690702SCase for tablet PCCHUNG JAEWOONG·Filed 2012·Granted Oct 1, 2013·112 cites·1 claims
- 0292US8739164B2Automatic suspend atomic hardware transactional memory in response to detecting an implicit suspend condition and resume thereofCHUNG JAEWOONG·Filed 2010·Granted May 27, 2014·20 cites·10 claims
- 0390US8453150B2Multithread application-aware memory scheduling scheme for multi-core processorsCHUNG JAEWOONG·Filed 2010·Granted May 28, 2013·14 cites·24 claims
- 0489US9110691B2Compiler support technique for hardware transactional memory systemsCHUNG JAEWOONG·Filed 2010·Granted Aug 18, 2015·18 cites·23 claims
- 0588US9710280B2Overlapping atomic regions in a processorCHUNG JAEWOONG·Filed 2011·Granted Jul 18, 2017·11 cites·20 claims
- 0687US8127057B2Multi-level buffering of transactional dataCHUNG JAEWOONG·Filed 2009·Granted Feb 28, 2012·17 cites·20 claims
- 0786US8819687B2Scheduling for multiple memory controllersCHUNG JAEWOONG·Filed 2010·Granted Aug 26, 2014·13 cites·23 claims
- 0883US8255603B2User-level interrupt mechanism for multi-core architecturesCHUNG JAEWOONG·Filed 2009·Granted Aug 28, 2012·9 cites·23 claims
- 0981US8850131B2Memory request scheduling based on thread criticalityCHUNG JAEWOONG·Filed 2010·Granted Sep 30, 2014·6 cites·22 claims
- 1080US8667493B2Memory-controller-parallelism-aware scheduling for multiple memory controllersCHUNG JAEWOONG·Filed 2010·Granted Mar 4, 2014·7 cites·20 claims
- 1178US8522244B2Method and apparatus for scheduling for multiple memory controllersCHUNG JAEWOONG·Filed 2010·Granted Aug 27, 2013·6 cites·20 claims
- 1276US9715388B2Instruction and logic to monitor loop trip count and remove loop optimizationsCHUNG JAEWOONG·Filed 2012·Granted Jul 25, 2017·4 cites·26 claims
- 1374US8854387B2Bundle-based CPU/GPU memory controller coordination mechanismCHUNG JAEWOONG·Filed 2010·Granted Oct 7, 2014·2 cites·22 claims
- 1467US8522245B2Thread criticality predictorCHUNG JAEWOONG·Filed 2010·Granted Aug 27, 2013·2 cites·18 claims
- 1565USD692422SPortable electronic deviceCHUNG JAEWOONG·Filed 2012·Granted Oct 29, 2013·13 cites·1 claims
- 1663US9880848B2Processor support for hardware transactional memoryCHUNG JAEWOONG·Filed 2010·Granted Jan 30, 2018·1 cites·18 claims
- 1762US9032156B2Memory access monitorCHUNG JAEWOONG·Filed 2011·Granted May 12, 2015·1 cites·20 claims
- 1860US8505016B2Enhanced shortest-job-first memory request schedulingCHUNG JAEWOONG·Filed 2010·Granted Aug 6, 2013·1 cites·14 claims
- 1952US8954775B2Power gating functional units of a processorCHUNG JAEWOONG·Filed 2012·Granted Feb 10, 2015·0 cites·19 claims
- 2041US2014095778A1Methods, systems and apparatus to cache code in non-volatile memoryCHUNG JAEWOONG·Filed 2012·Application pending·0 cites
- 2141US2012185714A1Method, apparatus, and system for energy efficiency and energy conservation including code recirculation techniquesCHUNG JAEWOONG·Filed 2011·Application pending·0 cites
- 2241US2012297131A1Scheduling-Policy-Aware DRAM Page Management MechanismCHUNG JAEWOONG·Filed 2011·Application pending·0 cites
- 2341US2012124297A1Coherence domain support for multi-tenant environmentCHUNG JAEWOONG·Filed 2010·Application pending·0 cites
- 2440US2012290793A1Efficient tag storage for large data cachesCHUNG JAEWOONG·Filed 2011·Application pending·0 cites
- 2533US2012221785A1Polymorphic Stacked DRAM Memory ArchitectureCHUNG JAEWOONG·Filed 2011·Application pending·0 cites
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