Assignee
ENHANCED MEMORY SYSTEMS INC
US·19 granted patents·550 citations·filing 1996–2003
Top patents by PatentIndex Score
19 records- 0196US5887272AEnhanced DRAM with embedded registersENHANCED MEMORY SYSTEMS INC·Filed 1997·Granted Mar 23, 1999·126 cites·32 claims
- 0288US6151236AEnhanced bus turnaround integrated circuit dynamic random access memory deviceENHANCED MEMORY SYSTEMS INC·Filed 2000·Granted Nov 21, 2000·50 cites·7 claims
- 0380US5991851AEnhanced signal processing random access memory device utilizing a DRAM memory array integrated with an associated SRAM cache and internal refresh controlENHANCED MEMORY SYSTEMS INC·Filed 1997·Granted Nov 23, 1999·50 cites·16 claims
- 0477US5875451AComputer hybrid memory including DRAM and EDRAM memory components, with secondary cache in EDRAM for DRAMENHANCED MEMORY SYSTEMS INC·Filed 1996·Granted Feb 23, 1999·82 cites·23 claims
- 0576US6330636B1Double data rate synchronous dynamic random access memory device incorporating a static RAM cache per memory bankENHANCED MEMORY SYSTEMS INC·Filed 1999·Granted Dec 11, 2001·85 cites·18 claims
- 0675US6347357B1Enhanced DRAM with embedded registersENHANCED MEMORY SYSTEMS INC·Filed 1998·Granted Feb 12, 2002·23 cites·4 claims
- 0773US6501698B1Structure and method for hiding DRAM cycle time behind a burst accessENHANCED MEMORY SYSTEMS INC·Filed 2000·Granted Dec 31, 2002·21 cites·17 claims
- 0871US6538928B1Method for reducing the width of a global data bus in a memory architectureENHANCED MEMORY SYSTEMS INC·Filed 2000·Granted Mar 25, 2003·18 cites·24 claims
- 0963US6301183B1Enhanced bus turnaround integrated circuit dynamic random access memory deviceENHANCED MEMORY SYSTEMS INC·Filed 2000·Granted Oct 9, 2001·12 cites·11 claims
- 1060US6646928B2Packet-based integrated circuit dynamic random access memory device incorporating an on-chip row register cache to reduce data access latenciesENHANCED MEMORY SYSTEMS INC·Filed 2003·Granted Nov 11, 2003·6 cites·11 claims
- 1159US6064620AMulti-array memory device, and associated method, having shared decoder circuitryENHANCED MEMORY SYSTEMS INC·Filed 1998·Granted May 16, 2000·19 cites·19 claims
- 1253US6549472B2Packet-based integrated circuit dynamic random access memory device incorporating an on-chip row register cache to reduce data access latenciesENHANCED MEMORY SYSTEMS INC·Filed 2002·Granted Apr 15, 2003·3 cites·12 claims
- 1348US6141281ATechnique for reducing element disable fuse pitch requirements in an integrated circuit device incorporating replaceable circuit elementsENHANCED MEMORY SYSTEMS INC·Filed 1998·Granted Oct 31, 2000·14 cites·20 claims
- 1444US6055192ADynamic random access memory word line boost technique employing a boost-on-writes policyENHANCED MEMORY SYSTEMS INC·Filed 1998·Granted Apr 25, 2000·9 cites·24 claims
- 1543US6373751B1Packet-based integrated circuit dynamic random access memory device incorporating an on-chip row register cache to reduce data access latenciesENHANCED MEMORY SYSTEMS INC·Filed 2000·Granted Apr 16, 2002·3 cites·8 claims
- 1642US6278646B1Multi-array memory device, and associated method, having shared decoder circuitryENHANCED MEMORY SYSTEMS INC·Filed 2000·Granted Aug 21, 2001·3 cites·6 claims
- 1738US5963481AEmbedded enhanced DRAM, and associated methodENHANCED MEMORY SYSTEMS INC·Filed 1998·Granted Oct 5, 1999·13 cites·22 claims
- 1833US6249840B1Multi-bank ESDRAM with cross-coupled SRAM cache registersENHANCED MEMORY SYSTEMS INC·Filed 1998·Granted Jun 19, 2001·7 cites·20 claims
- 1931US5835442AEDRAM with integrated generation and control of write enable and column latch signals and method for making sameENHANCED MEMORY SYSTEMS INC·Filed 1996·Granted Nov 10, 1998·6 cites·13 claims
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