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US4 patents

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US8520740B2Aug 27, 2013

Arithmetic decoding acceleration

FLACHS BRIAN56 citations95
US8683185B2Mar 25, 2014

Ceasing parallel processing of first set of loops upon selectable number of monitored terminations and processing second set

FLACHS BRIAN2 citations61
US8862827B2Oct 14, 2014

Efficient multi-level software cache using SIMD vector permute functionality

FLACHS BRIAN0 citations40
US8677101B2Mar 18, 2014

Method and apparatus for cooperative software multitasking in a processor system with a partitioned register file

FLACHS BRIAN0 citations39