Assignee
INTERGRAPH CORP
US138 patents
Top patents by PatentIndex Score
US5091846AFeb 25, 1992
Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency
INTERGRAPH CORP170 citations99
US5598115AJan 28, 1997
Comparator cell for use in a content addressable memory
INTERGRAPH CORP109 citations98
US5560028ASep 24, 1996
Software scheduled superscalar computer architecture
INTERGRAPH CORP172 citations98
US5255384AOct 19, 1993
Memory address translation system having modifiable and non-modifiable translation mechanisms
INTERGRAPH CORP114 citations98
US6292804B1Sep 18, 2001
Object relationship management system
INTERGRAPH CORP121 citations96
US6052691AApr 18, 2000
Object relationship management system
INTERGRAPH CORP121 citations96
US6046709AApr 4, 2000
Multiple display synchronization apparatus and method
INTERGRAPH CORP109 citations96
US5692184ANov 25, 1997
Object relationship management system
INTERGRAPH CORP101 citations96
US5461709AOct 24, 1995
3D input system for CAD systems
INTERGRAPH CORP60 citations96
US5446685AAug 29, 1995
Pulsed ground circuit for CAM and PAL memories
INTERGRAPH CORP62 citations96
US5274593ADec 28, 1993
High speed redundant rows and columns for semiconductor memories
INTERGRAPH CORP86 citations96
US6892293B2May 10, 2005
VLIW processor and method therefor
INTERGRAPH CORP55 citations95
US6392651B1May 21, 2002
Interactive timeline visualization
INTERGRAPH CORP101 citations95
US6185668B1Feb 6, 2001
Method and apparatus for speculative execution of instructions
INTERGRAPH CORP56 citations95
US5910804AJun 8, 1999
OLE for design and modeling
INTERGRAPH CORP96 citations95
US5338970AAug 16, 1994
Multi-layered integrated circuit package with improved high frequency performance
INTERGRAPH CORP46 citations95
US4933835AJun 12, 1990
Apparatus for maintaining consistency of a cache memory with a primary memory
INTERGRAPH CORP119 citations95
US4899275AFeb 6, 1990
Cache-MMU system
INTERGRAPH CORP78 citations95
US4884197ANov 28, 1989
Method and apparatus for addressing a cache memory
INTERGRAPH CORP62 citations95
US4860192AAug 22, 1989
Quadword boundary cache system
INTERGRAPH CORP112 citations95
US4811215AMar 7, 1989
Instruction execution accelerator for a pipelined digital machine with virtual memory
INTERGRAPH CORP60 citations95
US6198487B1Mar 6, 2001
Ole for design and modeling
INTERGRAPH CORP72 citations93
US6016392AJan 18, 2000
Method for object-oriented programming using dynamic interfaces
INTERGRAPH CORP47 citations93
US5778227AJul 7, 1998
System for adding attributes to an object at run time in an object oriented computer environment
INTERGRAPH CORP59 citations93
US5682468AOct 28, 1997
OLE for design and modeling
INTERGRAPH CORP56 citations93
US5216297AJun 1, 1993
Low voltage swing output mos circuit for driving an ecl circuit
INTERGRAPH CORP23 citations93
US6374329B1Apr 16, 2002
High-availability super server
INTERGRAPH CORP119 citations92
US6157393ADec 5, 2000
Apparatus and method of directing graphical data to a display device
INTERGRAPH CORP40 citations92
US6029257AFeb 22, 2000
Apparatus and method for testing computer systems
INTERGRAPH CORP95 citations92
US5996062ANov 30, 1999
Method and apparatus for controlling an instruction pipeline in a data processing system
INTERGRAPH CORP17 citations92
US5986669ANov 16, 1999
Graphics processing with efficient clipping
INTERGRAPH CORP36 citations92
US5831637ANov 3, 1998
Video stream data mixing for 3D graphics systems
INTERGRAPH CORP46 citations92
US5794037AAug 11, 1998
Direct access to slave processing by unprotected application using context saving and restoration
INTERGRAPH CORP32 citations92
US5794003AAug 11, 1998
Instruction cache associative crossbar switch system
INTERGRAPH CORP34 citations92
US5790461AAug 4, 1998
Register file with bypass capability
INTERGRAPH CORP45 citations92
US5546569AAug 13, 1996
Apparatus for writing data to and reading data from a multi-port RAM in a single clock cycle
INTERGRAPH CORP24 citations92
US5502829AMar 26, 1996
Apparatus for obtaining data from a translation memory based on carry signal from adder
INTERGRAPH CORP29 citations92
US5499445AMar 19, 1996
Method of making a multi-layer to package
INTERGRAPH CORP33 citations92
US5487025AJan 23, 1996
Carry chain adder using regenerative push-pull differential logic
INTERGRAPH CORP32 citations92
US5455528AOct 3, 1995
CMOS circuit for implementing Boolean functions
INTERGRAPH CORP23 citations92
US5299147AMar 29, 1994
Decoder scheme for fully associative translation-lookaside buffer
INTERGRAPH CORP55 citations92
US5917502AJun 29, 1999
Peer-to-peer parallel processing graphics accelerator
INTERGRAPH CORP54 citations91
US5878216AMar 2, 1999
System and method for controlling a slave processor
INTERGRAPH CORP35 citations91
US5864512AJan 26, 1999
High-speed video frame buffer using single port memory chips
INTERGRAPH CORP44 citations91
US5760792AJun 2, 1998
Fifo logical addresses for control and error recovery
INTERGRAPH CORP44 citations91
US5579222ANov 26, 1996
Distributed license administration system using a local policy server to communicate with a license server and control execution of computer programs
INTERGRAPH CORP301 citations91
US5542088AJul 30, 1996
Method and apparatus for enabling control of task execution
INTERGRAPH CORP269 citations91
US5047971ASep 10, 1991
Circuit simulation
INTERGRAPH CORP47 citations91
US4693444ASep 15, 1987
Height adjust mechanism
INTERGRAPH CORP58 citations91
US6633869B1Oct 14, 2003
Managing object relationships using an object repository
INTERGRAPH CORP82 citations90
Showing the top 50 of 138 patents by PatentIndex Score.