Assignee
ISHIMURA NAOYA
JP·3 granted patents·2 citations·filing 2008–2010
Technology mixG06F3
Top patents by PatentIndex Score
3 records- 0156US8200900B2Method and apparatus for controlling cache memoryISHIMURA NAOYA·Filed 2009·Granted Jun 12, 2012·1 cites·8 claims
- 0255US8161274B2Command selection method and its apparatusISHIMURA NAOYA·Filed 2008·Granted Apr 17, 2012·1 cites·7 claims
- 0338US8713291B2Cache memory control device, semiconductor integrated circuit, and cache memory control methodISHIMURA NAOYA·Filed 2010·Granted Apr 29, 2014·0 cites·6 claims
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