Assignee
JAO CHE-YUAN
TW·1 granted patent·4 pending applications·7 citations·filing 2008–2011
Top patents by PatentIndex Score
5 records- 0179US8692605B2Receiving circuits for core circuitsJAO CHE-YUAN·Filed 2011·Granted Apr 8, 2014·7 cites·20 claims
- 0246US2010171211A1Semiconductor deviceJAO CHE-YUAN·Filed 2009·Application pending·0 cites
- 0341US2011241206A1Semiconductor deviceJAO CHE-YUAN·Filed 2011·Application pending·0 cites
- 0440US2009294977A1Semiconductor die and bond pad arrangement method thereofJAO CHE-YUAN·Filed 2009·Application pending·0 cites
- 0535US2009184395A1Input/output (i/o) bufferJAO CHE-YUAN·Filed 2008·Application pending·0 cites
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