Assignee
JAVORKA PETER
DE7 patents
Top patents by PatentIndex Score
US9224863B2Dec 29, 2015
Performance enhancement in transistors by providing an embedded strain-inducing semiconductor material on the basis of a seed layer
JAVORKA PETER6 citations83
US8536009B2Sep 17, 2013
Differential threshold voltage adjustment in PMOS transistors by differential formation of a channel semiconductor material
JAVORKA PETER13 citations82
US8497180B2Jul 30, 2013
Transistor with boot shaped source/drain regions
JAVORKA PETER10 citations79
US8704229B2Apr 22, 2014
Partial poly amorphization for channeling prevention
JAVORKA PETER3 citations62
US8524564B2Sep 3, 2013
Full silicidation prevention via dual nickel deposition approach
JAVORKA PETER4 citations62
US8513074B2Aug 20, 2013
Reduced threshold voltage-width dependency and reduced surface topography in transistors comprising high-k metal gate electrode structures by a late carbon incorporation
JAVORKA PETER2 citations62
US8828816B2Sep 9, 2014
PMOS threshold voltage control by germanium implantation
JAVORKA PETER0 citations41