Assignee
JUENGLING WERNER
US37 patents
Top patents by PatentIndex Score
US8501607B1Aug 6, 2013
FinFET alignment structures using a double trench flow
JUENGLING WERNER64 citations98
US8921899B2Dec 30, 2014
Double gated 4F2 dram CHC cell and methods of fabricating the same
JUENGLING WERNER6 citations84
US8829602B2Sep 9, 2014
Integrated circuits and transistor design therefor
JUENGLING WERNER9 citations84
US8669159B2Mar 11, 2014
Devices with cavity-defined gates and methods of making the same
JUENGLING WERNER9 citations84
US8598653B2Dec 3, 2013
FinFET having cross-hair cells
JUENGLING WERNER9 citations84
US8546876B2Oct 1, 2013
Systems and devices including multi-transistor cells and methods of using, making, and operating the same
JUENGLING WERNER11 citations84
US8537608B2Sep 17, 2013
Data cells with drivers and methods of making and operating the same
JUENGLING WERNER5 citations84
US8399920B2Mar 19, 2013
Semiconductor device comprising a transistor gate having multiple vertically oriented sidewalls
JUENGLING WERNER7 citations84
US8293602B2Oct 23, 2012
Method of fabricating a finFET having cross-hair cells
JUENGLING WERNER12 citations84
US8294511B2Oct 23, 2012
Vertically stacked fin transistors and methods of fabricating and operating the same
JUENGLING WERNER10 citations84
US8148247B2Apr 3, 2012
Method and algorithm for random half pitched interconnect layout with constant spacing
JUENGLING WERNER7 citations84
US8148776B2Apr 3, 2012
Transistor with a passive gate
JUENGLING WERNER13 citations84
US8097910B2Jan 17, 2012
Vertical transistors
JUENGLING WERNER8 citations84
US8207583B2Jun 26, 2012
Memory device comprising an array portion and a logic portion
JUENGLING WERNER5 citations74
US8101497B2Jan 24, 2012
Self-aligned trench formation
JUENGLING WERNER4 citations74
US8076229B2Dec 13, 2011
Methods of forming data cells and connections to data cells
JUENGLING WERNER5 citations74
US9190494B2Nov 17, 2015
Systems and devices including fin field-effect transistors each having U-shaped semiconductor fin
JUENGLING WERNER4 citations73
US8866254B2Oct 21, 2014
Devices including fin transistors robust to gate shorts and methods of making the same
JUENGLING WERNER4 citations73
US8962401B2Feb 24, 2015
Double gated 4F2 dram CHC cell and methods of fabricating the same
JUENGLING WERNER1 citations63
US8916912B2Dec 23, 2014
Semiconductor device comprising a transistor gate having multiple vertically oriented sidewalls
JUENGLING WERNER3 citations63
US8772840B2Jul 8, 2014
Memory device comprising an array portion and a logic portion
JUENGLING WERNER3 citations63
US8617953B2Dec 31, 2013
Memory having a vertical access device
JUENGLING WERNER3 citations63
US8557656B2Oct 15, 2013
Cross-hair cell based floating body device
JUENGLING WERNER3 citations63
US8503228B2Aug 6, 2013
Data cells with drivers and methods of making and operating the same
JUENGLING WERNER2 citations63
US8497550B2Jul 30, 2013
Multi-level DRAM cell using CHC technology
JUENGLING WERNER2 citations63
US8450785B2May 28, 2013
Systems and devices including multi-gate transistors and methods of using, making, and operating the same
JUENGLING WERNER2 citations63
US8416610B2Apr 9, 2013
Systems and devices including local data lines and methods of using, making, and operating the same
JUENGLING WERNER2 citations63
US8278703B2Oct 2, 2012
Cross-hair cell based floating body device
JUENGLING WERNER2 citations63
US9553193B2Jan 24, 2017
Double gated fin transistors and methods of fabricating and operating the same
JUENGLING WERNER0 citations52
US8877639B2Nov 4, 2014
Method and algorithm for random half pitched interconnect layout with constant spacing
JUENGLING WERNER0 citations52
US8836023B2Sep 16, 2014
Memory device with recessed construction between memory constructions
JUENGLING WERNER0 citations52
US8760950B2Jun 24, 2014
Digit line equilibration using access devices at the edge of sub-arrays
JUENGLING WERNER0 citations52
US8629483B2Jan 14, 2014
Locally 2 sided CHC DRAM access transistor structure
JUENGLING WERNER1 citations52
US8592898B2Nov 26, 2013
Vertical gated access transistor
JUENGLING WERNER0 citations52
US8536631B2Sep 17, 2013
Data cells and connections to data cells
JUENGLING WERNER0 citations52
US8482046B2Jul 9, 2013
Concentric or nested container capacitor structure for integrated circuits
JUENGLING WERNER0 citations52
US7335964B2Feb 26, 2008
Semiconductor structures
JUENGLING WERNER0 citations52