Assignee
KALRAY
FR17 patents
Top patents by PatentIndex Score
US9565122B2Feb 7, 2017
Stream management in an on-chip network
KALRAY4 citations68
US11144480B2Oct 12, 2021
Atomic instruction having a local scope limited to an intermediate cache level
KALRAY2 citations66
US10915488B2Feb 9, 2021
Inter-processor synchronization system
KALRAY2 citations66
US12141626B2Nov 12, 2024
Configurable inter-processor synchronization system
KALRAY2 citations63
US9851977B2Dec 26, 2017
Apparatus and method for combining thread warps with compatible execution masks for simultaneous execution and increased lane utilization
KALRAY4 citations61
US11995218B2May 28, 2024
Processor with a configurable distribution of privileged resources and exceptions between protection rings
KALRAY0 citations53
US11604646B2Mar 14, 2023
Processor comprising a double multiplication and double addition operator actuable by an instruction with three operand references
KALRAY0 citations47
US10175989B2Jan 8, 2019
VLIW type instruction packet structure and processor suitable for processing such an instruction packet
KALRAY0 citations47
US11550544B2Jan 10, 2023
Fused Multiply-Add operator for mixed precision floating-point numbers with correct rounding
KALRAY0 citations45
US11489544B2Nov 1, 2022
Fast CRC computation circuit using an on-the-fly reconfigurable generator polynomial
KALRAY0 citations45
US11294627B2Apr 5, 2022
Floating point dot-product operator with correct rounding
KALRAY0 citations45
US9898251B2Feb 20, 2018
Bit-matrix multiplication using explicit register
KALRAY1 citations44
US11169808B2Nov 9, 2021
Blockwise matrix multiplication system
KALRAY0 citations41
US10250697B2Apr 2, 2019
Token bucket flow-rate limiter
KALRAY0 citations39
US9813348B2Nov 7, 2017
System for transmitting concurrent data flows on a network
KALRAY0 citations34
US10484514B2Nov 19, 2019
Method for dispatching network frames among processing resources
KALRAY0 citations29
US9766951B2Sep 19, 2017
Hardware synchronization barrier between processing units
KALRAY0 citations29