Assignee
LEE CHIEN HSIUN
TW·4 granted patents·4 citations·filing 2005–2012
Top patents by PatentIndex Score
4 records- 0162US8551813B2Wafer level IC assembly methodLEE CHIEN HSIUN·Filed 2012·Granted Oct 8, 2013·1 cites·20 claims
- 0255US8174114B2Semiconductor package structure with constraint stiffener for cleaning and underfilling efficiencyLEE CHIEN-HSIUN·Filed 2005·Granted May 8, 2012·3 cites·8 claims
- 0351US8247267B2Wafer level IC assembly methodLEE CHIEN HSIUN·Filed 2008·Granted Aug 21, 2012·0 cites·10 claims
- 0443US8232183B2Process and apparatus for wafer-level flip-chip assemblyLEE CHIEN-HSIUN·Filed 2007·Granted Jul 31, 2012·0 cites·14 claims
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