Assignee
LEE PETER WUNG
US·32 granted patents·9 pending applications·398 citations·filing 2008–2018
Top patents by PatentIndex Score
41 records- 0197US8773903B2High speed high density nand-based 2T-NOR flash memory designLEE PETER WUNG·Filed 2012·Granted Jul 8, 2014·33 cites·33 claims
- 0297US8120959B2NAND string based NAND/NOR flash memory cell, array, and memory device having parallel bit lines and source lines, having a programmable select gating transistor, and circuits and methods for operating sameLEE PETER WUNG·Filed 2009·Granted Feb 21, 2012·73 cites·56 claims
- 0396US9666286B2Self-timed SLC NAND pipeline and concurrent program without verificationLEE PETER WUNG·Filed 2015·Granted May 30, 2017·25 cites·46 claims
- 0493US9443579B2VSL-based VT-compensation and analog program scheme for NAND array without CSLLEE PETER WUNG·Filed 2015·Granted Sep 13, 2016·16 cites·57 claims
- 0593US8120966B2Method and apparatus for management of over-erasure in NAND-based NOR-type flash memoryLEE PETER WUNG·Filed 2010·Granted Feb 21, 2012·19 cites·71 claims
- 0692US9659636B2NAND memory array with BL-hierarchical structure for concurrent all-BL, all-threshold-state program, and alternative-WL program, odd/even read and verify operationsLEE PETER WUNG·Filed 2015·Granted May 23, 2017·14 cites·134 claims
- 0792US9595319B2Partial/full array/block erase for 2D/3D hierarchical NANDLEE PETER WUNG·Filed 2016·Granted Mar 14, 2017·13 cites·59 claims
- 0891US8335108B2Bit line gate transistor structure for a multilevel, dual-sided nonvolatile memory cell NAND flash arrayLEE PETER WUNG·Filed 2008·Granted Dec 18, 2012·19 cites·28 claims
- 0991US8289775B2Apparatus and method for inhibiting excess leakage current in unselected nonvolatile memory cells in an arrayLEE PETER WUNG·Filed 2009·Granted Oct 16, 2012·24 cites·77 claims
- 1090US8455923B2Embedded NOR flash memory process with NAND cell and true logic compatible low voltage deviceLEE PETER WUNG·Filed 2011·Granted Jun 4, 2013·10 cites·66 claims
- 1190US8072811B2NAND based NMOS NOR flash memory cell, a NAND based NMOS NOR flash memory array, and a method of forming a NAND based NMOS NOR flash memory arrayLEE PETER WUNG·Filed 2009·Granted Dec 6, 2011·18 cites·92 claims
- 1289US8149622B2Memory system having NAND-based NOR and NAND flashes and SRAM integrated in one chip for hybrid data, code and cache storageLEE PETER WUNG·Filed 2010·Granted Apr 3, 2012·13 cites·73 claims
- 1388US9443578B2NAND array architecture for multiple simultaneous program and readLEE PETER WUNG·Filed 2015·Granted Sep 13, 2016·7 cites·20 claims
- 1488US9437306B2NAND array architecture for multiple simutaneous program and readLEE PETER WUNG·Filed 2015·Granted Sep 6, 2016·7 cites·21 claims
- 1588US9183940B2Low disturbance, power-consumption, and latency in NAND read and program-verify operationsLEE PETER WUNG·Filed 2014·Granted Nov 10, 2015·11 cites·33 claims
- 1686US9524773B2Multi-task concurrent/pipeline NAND operations on all planesLEE PETER WUNG·Filed 2015·Granted Dec 20, 2016·8 cites·26 claims
- 1786US8472251B2Single-polycrystalline silicon electrically erasable and programmable nonvolatile memory deviceLEE PETER WUNG·Filed 2009·Granted Jun 25, 2013·12 cites·65 claims
- 1885US8634241B2Universal timing waveforms sets to improve random access read and write speed of memoriesLEE PETER WUNG·Filed 2011·Granted Jan 21, 2014·8 cites·6 claims
- 1984US8933500B2EEPROM-based, data-oriented combo NVM designLEE PETER WUNG·Filed 2011·Granted Jan 13, 2015·7 cites·75 claims
- 2083US8233320B2High speed high density NAND-based 2T-NOR flash memory designLEE PETER WUNG·Filed 2010·Granted Jul 31, 2012·7 cites·30 claims
- 2182US9530492B2NAND array hiarchical BL structures for multiple-WL and All-BL simultaneous erase, erase-verify, program, program-verify, and read operationsLEE PETER WUNG·Filed 2015·Granted Dec 27, 2016·5 cites·25 claims
- 2281US9063849B2Different types of memory integrated in one chip by using a novel protocolLEE PETER WUNG·Filed 2011·Granted Jun 23, 2015·7 cites·8 claims
- 2379US8964470B2Method and architecture for improving defect detectability, coupling area, and flexibility of NVSRAM cells and arraysLEE PETER WUNG·Filed 2013·Granted Feb 24, 2015·4 cites·47 claims
- 2479US8582363B2Method and apparatus for management of over-erasure in NAND-based NOR-type flash memoryLEE PETER WUNG·Filed 2011·Granted Nov 12, 2013·7 cites·6 claims
- 2577US8559232B2DRAM-like NVM memory array and sense amplifier design for high temperature and high endurance operationLEE PETER WUNG·Filed 2011·Granted Oct 15, 2013·6 cites·43 claims
- 2675US8295087B2Row-decoder and select gate decoder structures suitable for flashed-based EEPROM operating below +/− 10v BVDSLEE PETER WUNG·Filed 2009·Granted Oct 23, 2012·9 cites·93 claims
- 2771US8462553B2Cell array for highly-scalable, byte-alterable, two-transistor FLOTOX EEPROM non-volatile memoryLEE PETER WUNG·Filed 2010·Granted Jun 11, 2013·4 cites·58 claims
- 2871US8274829B2Row-decoder and source-decoder structures suitable for erase in unit of page, sector and chip of a NOR-type flash operating below +/− 10V BVDSLEE PETER WUNG·Filed 2009·Granted Sep 25, 2012·7 cites·93 claims
- 2965US8837221B2Write bias condition for 2T-string NOR flash cellLEE PETER WUNG·Filed 2011·Granted Sep 16, 2014·3 cites·19 claims
- 3061US8917551B2Flexible 2T-based fuzzy and certain matching arraysLEE PETER WUNG·Filed 2012·Granted Dec 23, 2014·2 cites·33 claims
- 3147US9177658B21T1b and 2T2b flash-based, data-oriented EEPROM designLEE PETER WUNG·Filed 2014·Granted Nov 3, 2015·0 cites·15 claims
- 3245US2019018778A1Hierarchical nand memory device capable of performing concurrent and pipeline operationsLEE PETER WUNG·Filed 2018·Application pending·0 cites
- 3340US2013215683A1Three-Dimensional Flash-Based Combo Memory and Logic DesignLEE PETER WUNG·Filed 2012·Application pending·0 cites
- 3439US8809148B2EEPROM-based, data-oriented combo NVM designLEE PETER WUNG·Filed 2011·Granted Aug 19, 2014·0 cites·7 claims
- 3538US2012020157A1Novel high-temperature non-volatile memory designLEE PETER WUNG·Filed 2011·Application pending·0 cites
- 3637US2013294161A1Low-voltage fast-write nvsram cellLEE PETER WUNG·Filed 2013·Application pending·0 cites
- 3735US2017352424A1Plural Distributed PBS with Both Voltage and Current Sensing SA for J-Page Hierarchical NAND Array's Concurrent OperationsLEE PETER WUNG·Filed 2017·Application pending·0 cites
- 3835US2012063223A1Most compact flotox-based combo NVM design without sacrificing EEPROM endurance cycles for 1-die data and code storageLEE PETER WUNG·Filed 2011·Application pending·0 cites
- 3935US2012191902A1One-Die Flotox-Based Combo Non-Volatile MemoryLEE PETER WUNG·Filed 2012·Application pending·0 cites
- 4034US2011199830A1Flotox-based, bit-alterable, combo flash and eeprom memoryLEE PETER WUNG·Filed 2011·Application pending·0 cites
- 4133US2016172037A1Novel lv nand-cam search scheme using existing circuits with least overheadLEE PETER WUNG·Filed 2015·Application pending·0 cites
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