Assignee
LERNER RALF
DE9 patents
Top patents by PatentIndex Score
US8278183B2Oct 2, 2012
Production of isolation trenches with different sidewall dopings
LERNER RALF32 citations91
US8823095B2Sep 2, 2014
MOS-power transistors with edge termination with small area requirement
LERNER RALF5 citations72
US8247884B2Aug 21, 2012
Semiconductor structure for fabricating a handle wafer contact in a trench insulated SOI disc
LERNER RALF2 citations61
US9070768B2Jun 30, 2015
DMOS transistor having an increased breakdown voltage and method for production
LERNER RALF2 citations51
US8530999B2Sep 10, 2013
Semiconductor component with isolation trench intersections
LERNER RALF0 citations50
US8793116B2Jul 29, 2014
Method for the construction of vertical power transistors with differing powers by combination of pre-defined part pieces
LERNER RALF0 citations45
US8190415B2May 29, 2012
Method for the construction of vertical power transistors with differing powers by combination of pre-defined part pieces
LERNER RALF0 citations45
US8921945B2Dec 30, 2014
High-voltage power transistor using SOI technology
LERNER RALF0 citations40
US8448101B2May 21, 2013
Layout method for vertical power transistors having a variable channel width
LERNER RALF0 citations35