Assignee
MAHESHWARI DINESH
US·12 granted patents·57 citations·filing 2006–2012
Top patents by PatentIndex Score
12 records- 0193US8572320B1Memory devices and systems including cache devices for memory modulesMAHESHWARI DINESH·Filed 2009·Granted Oct 29, 2013·29 cites·19 claims
- 0283US8122189B1Methods for logically combining range representation values in a content addressable memoryMAHESHWARI DINESH·Filed 2010·Granted Feb 21, 2012·6 cites·20 claims
- 0382US9489326B1Multi-port integrated circuit devices and methodsMAHESHWARI DINESH·Filed 2010·Granted Nov 8, 2016·11 cites·20 claims
- 0480US8570790B2Memory devices and methods for high random transaction rateMAHESHWARI DINESH·Filed 2011·Granted Oct 29, 2013·5 cites·20 claims
- 0572US9965387B1Memory devices having embedded hardware acceleration and corresponding methodsMAHESHWARI DINESH·Filed 2011·Granted May 8, 2018·3 cites·19 claims
- 0663US8725983B2Memory devices and systems including multi-speed access of memory modulesMAHESHWARI DINESH·Filed 2010·Granted May 13, 2014·1 cites·9 claims
- 0753US8595398B2Multi-port memory devices and methodsMAHESHWARI DINESH·Filed 2010·Granted Nov 26, 2013·1 cites·20 claims
- 0848US8230167B1Block mapping circuit and method for memory deviceMAHESHWARI DINESH·Filed 2006·Granted Jul 24, 2012·1 cites·16 claims
- 0945US9465576B1First-in-first-out (FIFO) memory devices and methods having multiple queuingMAHESHWARI DINESH·Filed 2010·Granted Oct 11, 2016·0 cites·22 claims
- 1044US8645621B2Block mapping circuit and method for memory deviceMAHESHWARI DINESH·Filed 2012·Granted Feb 4, 2014·0 cites·17 claims
- 1144US8060708B2Multiprocessor system having an input/output (I/O) bridge circuit for transferring data between volatile and non-volatile memoryMAHESHWARI DINESH·Filed 2010·Granted Nov 15, 2011·0 cites·20 claims
- 1235US9576630B2Memory devices and methods having multiple address accesses in same cycleMAHESHWARI DINESH·Filed 2011·Granted Feb 21, 2017·0 cites·22 claims
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