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MEGIC CORP

TW46 patents

Top patents by PatentIndex Score

US6917119B2Jul 12, 2005

Low fabrication cost, high performance, high reliability chip scale package

MEGIC CORP106 citations99
US6818545B2Nov 16, 2004

Low fabrication cost, fine pitch and high reliability solder bump

MEGIC CORP271 citations99
US6759275B1Jul 6, 2004

Method for making high-performance RF integrated circuits

MEGIC CORP175 citations99
US6756295B2Jun 29, 2004

Chip structure and process for forming the same

MEGIC CORP141 citations99
US6734563B2May 11, 2004

Post passivation interconnection schemes on top of the IC chips

MEGIC CORP79 citations99
US6673698B1Jan 6, 2004

Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers

MEGIC CORP100 citations99
US6649509B1Nov 18, 2003

Post passivation metal scheme for high-performance integrated circuit devices

MEGIC CORP156 citations99
US6642136B1Nov 4, 2003

Method of making a low fabrication cost, high performance, high reliability chip scale package

MEGIC CORP123 citations99
US6605528B1Aug 12, 2003

Post passivation metal scheme for high-performance integrated circuit devices

MEGIC CORP151 citations99
US6495442B1Dec 17, 2002

Post passivation interconnection schemes on top of the IC chips

MEGIC CORP207 citations99
US6455885B1Sep 24, 2002

Inductor structure for high performance system-on-chip using post passivation process

MEGIC CORP178 citations99
US6426556B1Jul 30, 2002

Reliable metal bumps on top of I/O pads with test probe marks

MEGIC CORP177 citations99
US6303423B1Oct 16, 2001

Method for forming high performance system-on-chip using post passivation process

MEGIC CORP272 citations99
US7045901B2May 16, 2006

Chip-on-chip connection with second chip located in rectangular open window hole in printed circuit board

MEGIC CORP91 citations98
US6800941B2Oct 5, 2004

Integrated chip package structure using ceramic substrate and method of manufacturing the same

MEGIC CORP76 citations98
US6798073B2Sep 28, 2004

Chip structure and process for forming the same

MEGIC CORP78 citations98
US6762115B2Jul 13, 2004

Chip structure and process for forming the same

MEGIC CORP90 citations98
US6746898B2Jun 8, 2004

Integrated chip package structure using silicon substrate and method of manufacturing the same

MEGIC CORP99 citations98
US6593649B1Jul 15, 2003

Methods of IC rerouting option for multiple package system applications

MEGIC CORP77 citations98
US6515369B1Feb 4, 2003

High performance system-on-chip using post passivation process

MEGIC CORP90 citations98
US6350705B1Feb 26, 2002

Wafer scale packaging scheme

MEGIC CORP83 citations98
US6897507B2May 24, 2005

Capacitor for high performance system-on-chip using post passivation device

MEGIC CORP29 citations96
US6869870B2Mar 22, 2005

High performance system-on-chip discrete components using post passivation process

MEGIC CORP57 citations96
US6815324B2Nov 9, 2004

Reliable metal bumps on top of I/O pads after removal of test probe marks

MEGIC CORP70 citations96
US6620728B2Sep 16, 2003

Top layers of metal for high performance IC's

MEGIC CORP55 citations96
US6586266B1Jul 1, 2003

High performance sub-system design and assembly

MEGIC CORP66 citations96
US6495912B1Dec 17, 2002

Structure of ceramic package with integrated passive devices

MEGIC CORP64 citations96
US6489647B1Dec 3, 2002

Capacitor for high performance system-on-chip using post passivation process structure

MEGIC CORP59 citations96
US6399997B1Jun 4, 2002

High performance system-on-chip using post passivation process and glass substrates

MEGIC CORP60 citations96
US6784087B2Aug 31, 2004

Method of fabricating cylindrical bonding structure

MEGIC CORP60 citations95
US6768208B2Jul 27, 2004

Multiple chips bonded to packaging structure with low noise and multiple selectable functions

MEGIC CORP52 citations95
US6939747B1Sep 6, 2005

Multiple selectable function integrated circuit module

MEGIC CORP13 citations93
US6936531B2Aug 30, 2005

Process of fabricating a chip structure

MEGIC CORP17 citations93
US6806570B1Oct 19, 2004

Thermal compliant semiconductor chip wiring structure for chip scale packaging

MEGIC CORP30 citations93
US6700162B2Mar 2, 2004

Chip structure to improve resistance-capacitance delay and reduce energy loss of the chip

MEGIC CORP35 citations93
US6489656B1Dec 3, 2002

Resistor for high performance system-on-chip using post passivation process

MEGIC CORP31 citations93
US7205646B2Apr 17, 2007

Electronic device and chip package

MEGIC CORP20 citations92
US6791192B2Sep 14, 2004

Multiple chips bonded to packaging structure with low noise and multiple selectable functions

MEGIC CORP16 citations92
US7288845B2Oct 30, 2007

Fabrication of wire bond pads over underlying active devices, passive devices and/or dielectric layers in integrated circuits

MEGIC CORP12 citations84
US6399975B1Jun 4, 2002

Wide bit memory using post passivation interconnection scheme

MEGIC CORP15 citations75
US6809935B1Oct 26, 2004

Thermally compliant PCB substrate for the application of chip scale packages

MEGIC CORP10 citations74
US6387801B1May 14, 2002

Method and an apparatus to electroless plate a metal layer while eliminating the photoelectric effect

MEGIC CORP6 citations74
US6802945B2Oct 12, 2004

Method of metal sputtering for integrated circuit metal routing

MEGIC CORP10 citations72
US6522009B2Feb 18, 2003

Apparatus to electroless plate a metal layer while eliminating the photo electric effect

MEGIC CORP2 citations63
US6768194B2Jul 27, 2004

Electrode for electroplating planar structures

MEGIC CORP4 citations59
US6638840B1Oct 28, 2003

Electrode for electroplating planar structures

MEGIC CORP4 citations59