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MEGICA CORP
TW162 patents
Top patents by PatentIndex Score
US7969006B2Jun 28, 2011
Integrated circuit chips with fine-line metal and over-passivation metal
MEGICA CORP96 citations99
US7242099B2Jul 10, 2007
Chip package with multiple chips connected by bumps
MEGICA CORP175 citations99
US8021918B2Sep 20, 2011
Integrated circuit chips with fine-line metal and over-passivation metal
MEGICA CORP45 citations98
US7902679B2Mar 8, 2011
Structure and manufacturing method of a chip scale package with low fabrication cost, fine pitch and high reliability solder bump
MEGICA CORP111 citations98
US7465654B2Dec 16, 2008
Structure of gold bumps and gold conductors on one IC die and methods of manufacturing the structures
MEGICA CORP60 citations98
US7420276B2Sep 2, 2008
Post passivation structure for semiconductor chip or wafer
MEGICA CORP62 citations98
US7413929B2Aug 19, 2008
Integrated chip package structure using organic substrate and method of manufacturing the same
MEGICA CORP62 citations98
US7405149B1Jul 29, 2008
Post passivation method for semiconductor chip or wafer
MEGICA CORP67 citations98
US7372161B2May 13, 2008
Post passivation interconnection schemes on top of the IC chips
MEGICA CORP58 citations98
US7271489B2Sep 18, 2007
Post passivation interconnection schemes on top of the IC chips
MEGICA CORP69 citations98
US7230340B2Jun 12, 2007
Post passivation interconnection schemes on top of the IC chips
MEGICA CORP67 citations98
US7470997B2Dec 30, 2008
Wirebond pad for semiconductor chip or wafer
MEGICA CORP66 citations97
US7247932B1Jul 24, 2007
Chip package with capacitor
MEGICA CORP67 citations97
US7208834B2Apr 24, 2007
Bonding structure with pillar and cap
MEGICA CORP59 citations97
US8004092B2Aug 23, 2011
Semiconductor chip with post-passivation scheme formed over passivation layer
MEGICA CORP42 citations96
US7863654B2Jan 4, 2011
Top layers of metal for high performance IC's
MEGICA CORP16 citations96
US7521812B2Apr 21, 2009
Method of wire bonding over active area of a semiconductor circuit
MEGICA CORP37 citations96
US7498196B2Mar 3, 2009
Structure and manufacturing method of chip scale package
MEGICA CORP47 citations96
US7479450B2Jan 20, 2009
Post passivation interconnection schemes on top of the IC chips
MEGICA CORP18 citations96
US7446035B2Nov 4, 2008
Post passivation interconnection schemes on top of IC chips
MEGICA CORP16 citations96
US7423346B2Sep 9, 2008
Post passivation interconnection process and structures
MEGICA CORP48 citations96
US7397121B2Jul 8, 2008
Semiconductor chip with post-passivation scheme formed over passivation layer
MEGICA CORP49 citations96
US7351650B2Apr 1, 2008
Post passivation interconnection schemes on top of the IC chips
MEGICA CORP15 citations96
US7345365B2Mar 18, 2008
Electronic component with die and passive device
MEGICA CORP37 citations96
US7282804B2Oct 16, 2007
Structure of high performance combo chip and processing method
MEGICA CORP27 citations96
US7271033B2Sep 18, 2007
Method for fabricating chip package
MEGICA CORP53 citations96
US7265047B2Sep 4, 2007
Post passivation interconnection schemes on top of the IC chips
MEGICA CORP19 citations96
US8809951B2Aug 19, 2014
Chip packages having dual DMOS devices with power management integrated circuits
MEGICA CORP22 citations93
US8026588B2Sep 27, 2011
Method of wire bonding over active area of a semiconductor circuit
MEGICA CORP10 citations93
US8022552B2Sep 20, 2011
Integrated circuit and method for fabricating the same
MEGICA CORP17 citations93
US8021976B2Sep 20, 2011
Method of wire bonding over active area of a semiconductor circuit
MEGICA CORP15 citations93
US8022544B2Sep 20, 2011
Chip structure
MEGICA CORP17 citations93
US8004083B2Aug 23, 2011
Integrated circuit chips with fine-line metal and over-passivation metal
MEGICA CORP19 citations93
US8004088B2Aug 23, 2011
Post passivation interconnection schemes on top of IC chip
MEGICA CORP10 citations93
US7999384B2Aug 16, 2011
Top layers of metal for high performance IC's
MEGICA CORP7 citations93
US7989954B2Aug 2, 2011
Integrated circuit chips with fine-line metal and over-passivation metal
MEGICA CORP21 citations93
US7977763B2Jul 12, 2011
Chip package with die and substrate
MEGICA CORP30 citations93
US7960269B2Jun 14, 2011
Method for forming a double embossing structure
MEGICA CORP21 citations93
US7923366B2Apr 12, 2011
Post passivation interconnection schemes on top of IC chip
MEGICA CORP8 citations93
US7919873B2Apr 5, 2011
Structure of high performance combo chip and processing method
MEGICA CORP18 citations93
US7919865B2Apr 5, 2011
Post passivation interconnection schemes on top of IC chip
MEGICA CORP8 citations93
US7915161B2Mar 29, 2011
Post passivation interconnection schemes on top of IC chip
MEGICA CORP10 citations93
US7902067B2Mar 8, 2011
Post passivation interconnection schemes on top of the IC chips
MEGICA CORP8 citations93
US7884479B2Feb 8, 2011
Top layers of metal for high performance IC's
MEGICA CORP8 citations93
US7868454B2Jan 11, 2011
High performance sub-system design and assembly
MEGICA CORP15 citations93
US7863739B2Jan 4, 2011
Low fabrication cost, fine pitch and high reliability solder bump
MEGICA CORP28 citations93
US7582966B2Sep 1, 2009
Semiconductor chip and method for fabricating the same
MEGICA CORP35 citations93
US7569422B2Aug 4, 2009
Chip package and method for fabricating the same
MEGICA CORP23 citations93
US7535102B2May 19, 2009
High performance sub-system design and assembly
MEGICA CORP20 citations93
US7531417B2May 12, 2009
High performance system-on-chip passive device using post passivation process
MEGICA CORP27 citations93
Showing the top 50 of 162 patents by PatentIndex Score.