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MENTOR GRAPHICS CORP
US510 patents
Top patents by PatentIndex Score
US5991898ANov 23, 1999
Arithmetic built-in self test of multiple scan-based integrated circuits
MENTOR GRAPHICS CORP229 citations99
US5991909ANov 23, 1999
Parallel decompressor and related methods and apparatuses
MENTOR GRAPHICS CORP246 citations99
US5777489AJul 7, 1998
Field programmable gate array with integrated debugging facilities
MENTOR GRAPHICS CORP103 citations99
US5754827AMay 19, 1998
Method and apparatus for performing fully visible tracing of an emulation
MENTOR GRAPHICS CORP146 citations99
US5036473AJul 30, 1991
Method of using electronically reconfigurable logic circuits
MENTOR GRAPHICS CORP428 citations99
US7913137B2Mar 22, 2011
On-chip comparison and response collection tools and techniques
MENTOR GRAPHICS CORP60 citations98
US7757135B2Jul 13, 2010
Method and apparatus for storing and distributing memory repair information
MENTOR GRAPHICS CORP70 citations98
US6516459B1Feb 4, 2003
Integrated circuit design correction using fragment correspondence
MENTOR GRAPHICS CORP309 citations98
US5999725ADec 7, 1999
Method and apparatus tracing any node of an emulation
MENTOR GRAPHICS CORP90 citations98
US6430737B1Aug 6, 2002
Convergence technique for model-based optical and process correction
MENTOR GRAPHICS CORP83 citations97
US6415421B2Jul 2, 2002
Integrated verification and manufacturability tool
MENTOR GRAPHICS CORP377 citations97
US6848088B1Jan 25, 2005
Measure of analysis performed in property checking
MENTOR GRAPHICS CORP69 citations96
US6070261AMay 30, 2000
Multi-phase test point insertion for built-in self test of integrated circuits
MENTOR GRAPHICS CORP42 citations96
US6057706AMay 2, 2000
Field programmable gate array with integrated debugging facilities
MENTOR GRAPHICS CORP47 citations96
US5790832AAug 4, 1998
Method and apparatus for tracing any node of an emulation
MENTOR GRAPHICS CORP55 citations96
US5574388ANov 12, 1996
Emulation system having a scalable multi-level multi-stage programmable interconnect network
MENTOR GRAPHICS CORP93 citations96
US7367009B2Apr 29, 2008
Convergence technique for model-based optical and process correction
MENTOR GRAPHICS CORP53 citations95
US7073162B2Jul 4, 2006
Site control for OPC
MENTOR GRAPHICS CORP101 citations95
US5771370AJun 23, 1998
Method and apparatus for optimizing hardware and software co-simulation
MENTOR GRAPHICS CORP94 citations95
US10476740B1Nov 12, 2019
Data generation for streaming networks in circuits
MENTOR GRAPHICS CORP16 citations94
US6885983B1Apr 26, 2005
Method for automatically searching for functional defects in a description of a circuit
MENTOR GRAPHICS CORP42 citations94
US6473885B1Oct 29, 2002
Digital circuit layout techniques using circuit decomposition and pin swapping
MENTOR GRAPHICS CORP38 citations94
US6230299B1May 8, 2001
Method and apparatus for extracting and storing connectivity and geometrical data for a deep sub-micron integrated circuit design
MENTOR GRAPHICS CORP326 citations94
US5999911ADec 7, 1999
Method and system for managing workflow
MENTOR GRAPHICS CORP627 citations94
US4744084AMay 10, 1988
Hardware modeling system and method for simulating portions of electrical circuits
MENTOR GRAPHICS CORP163 citations94
US9262567B2Feb 16, 2016
Resource mapping in a hardware emulation environment
MENTOR GRAPHICS CORP24 citations93
US7900104B2Mar 1, 2011
Test pattern compression for an integrated circuit test environment
MENTOR GRAPHICS CORP17 citations93
US7877656B2Jan 25, 2011
Continuous application and decompression of test patterns to a circuit-under-test
MENTOR GRAPHICS CORP16 citations93
US7865794B2Jan 4, 2011
Decompressor/PRPG for applying pseudo-random and deterministic test patterns
MENTOR GRAPHICS CORP14 citations93
US7805649B2Sep 28, 2010
Method and apparatus for selectively compacting test responses
MENTOR GRAPHICS CORP26 citations93
US6240376B1May 29, 2001
Method and apparatus for gate-level simulation of synthesized register transfer level designs with source-level debugging
MENTOR GRAPHICS CORP94 citations93
US6212489B1Apr 3, 2001
Optimizing hardware and software co-verification system
MENTOR GRAPHICS CORP61 citations93
US5768567AJun 16, 1998
Optimizing hardware and software co-simulator
MENTOR GRAPHICS CORP90 citations93
US4912664AMar 27, 1990
Method and apparatus for generating a mesh for finite element analysis
MENTOR GRAPHICS CORP87 citations93
US7987442B2Jul 26, 2011
Fault dictionaries for integrated circuit yield and quality analysis methods and systems
MENTOR GRAPHICS CORP38 citations92
US7987434B2Jul 26, 2011
Calculation system for inverse masks
MENTOR GRAPHICS CORP20 citations92
US7925465B2Apr 12, 2011
Low power scan testing techniques and apparatus
MENTOR GRAPHICS CORP37 citations92
US7698118B2Apr 13, 2010
Logic design modeling and interconnection
MENTOR GRAPHICS CORP20 citations92
US7378202B2May 27, 2008
Grid-based resist simulation
MENTOR GRAPHICS CORP39 citations92
US6947882B1Sep 20, 2005
Regionally time multiplexed emulation system
MENTOR GRAPHICS CORP17 citations92
US6934674B1Aug 23, 2005
Clock generation and distribution in an emulation system
MENTOR GRAPHICS CORP59 citations92
US5907697AMay 25, 1999
Emulation system having a scalable multi-level multi-stage hybrid programmable interconnect network
MENTOR GRAPHICS CORP38 citations92
US5737340AApr 7, 1998
Multi-phase test point insertion for built-in self test of integrated circuits
MENTOR GRAPHICS CORP39 citations92
US5703798ADec 30, 1997
Switch level simulation employing dynamic short-circuit ratio
MENTOR GRAPHICS CORP24 citations92
US9026423B2May 5, 2015
Fault support in an emulation environment
MENTOR GRAPHICS CORP22 citations91
US8914761B2Dec 16, 2014
Metastability effects simulation for a circuit description
MENTOR GRAPHICS CORP24 citations91
US8645118B2Feb 4, 2014
Fault support in an emulation environment
MENTOR GRAPHICS CORP22 citations91
US8056022B2Nov 8, 2011
Analysis optimizer
MENTOR GRAPHICS CORP15 citations91
US7983893B2Jul 19, 2011
Fault support in an emulation environment
MENTOR GRAPHICS CORP26 citations91
US7890897B2Feb 15, 2011
Measure of analysis performed in property checking
MENTOR GRAPHICS CORP11 citations91
Showing the top 50 of 510 patents by PatentIndex Score.