Assignee
MYERS JAMES EDWARD
GB·8 granted patents·53 citations·filing 2009–2012
Top patents by PatentIndex Score
8 records- 0194US8456223B2Integrated circuit with power gatingMYERS JAMES EDWARD·Filed 2011·Granted Jun 4, 2013·16 cites·16 claims
- 0284US8390328B2Supplying a clock signal and a gated clock signal to synchronous elementsMYERS JAMES EDWARD·Filed 2011·Granted Mar 5, 2013·8 cites·24 claims
- 0381US8604831B2Integrated circuit, clock gating circuit, and methodMYERS JAMES EDWARD·Filed 2011·Granted Dec 10, 2013·5 cites·27 claims
- 0478US8665009B2Integrated circuit and method for controlling load on the output from on-chip voltage generation circuitryMYERS JAMES EDWARD·Filed 2012·Granted Mar 4, 2014·5 cites·29 claims
- 0577US8451039B2Apparatus for storing a data value in a retention modeMYERS JAMES EDWARD·Filed 2011·Granted May 28, 2013·7 cites·15 claims
- 0675US8922247B2Power controlling integrated circuit and retention switching circuitMYERS JAMES EDWARD·Filed 2010·Granted Dec 30, 2014·4 cites·32 claims
- 0772US8330478B2Operating parameter monitoring circuit and methodMYERS JAMES EDWARD·Filed 2009·Granted Dec 11, 2012·6 cites·27 claims
- 0868US8868962B2Monitoring circuit and methodMYERS JAMES EDWARD·Filed 2012·Granted Oct 21, 2014·2 cites·20 claims
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