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US10 patents

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US5230068AJul 20, 1993

Cache memory system for dynamically altering single cache memory line as either branch target entry or pre-fetch instruction queue based upon instruction sequence

NEXGEN MICROSYSTEMS139 citations99
US5226130AJul 6, 1993

Method and apparatus for store-into-instruction-stream detection and maintaining branch prediction cache consistency

NEXGEN MICROSYSTEMS300 citations99
US5163140ANov 10, 1992

Two-level branch prediction cache

NEXGEN MICROSYSTEMS145 citations99
US5226126AJul 6, 1993

Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags

NEXGEN MICROSYSTEMS449 citations98
US5327547AJul 5, 1994

Two-level branch prediction cache

NEXGEN MICROSYSTEMS46 citations96
US5125093AJun 23, 1992

Interrupt control for multiprocessor computer system

NEXGEN MICROSYSTEMS71 citations96
US5369748ANov 29, 1994

Bus arbitration in a dual-bus architecture where one bus has relatively high latency

NEXGEN MICROSYSTEMS67 citations95
US5093778AMar 3, 1992

Integrated single structure branch prediction cache

NEXGEN MICROSYSTEMS61 citations94
US5479124ADec 26, 1995

Slew rate controller for high speed bus

NEXGEN MICROSYSTEMS51 citations92
US5388227AFeb 7, 1995

Transparent data bus sizing

NEXGEN MICROSYSTEMS29 citations92