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PULSIC LTD
GB29 patents
Top patents by PatentIndex Score
US7257797B1Aug 14, 2007
Method of automatic shape-based routing of interconnects in spines for integrated circuit design
PULSIC LTD62 citations98
US10783292B1Sep 22, 2020
Automated analog layout
PULSIC LTD41 citations96
US7784010B1Aug 24, 2010
Automatic routing system with variable width interconnect
PULSIC LTD45 citations96
US7363607B2Apr 22, 2008
Method of automatically routing nets according to parasitic constraint rules
PULSIC LTD34 citations96
US7131096B1Oct 31, 2006
Method of automatically routing nets according to current density rules
PULSIC LTD59 citations96
US8966425B1Feb 24, 2015
Clock tree generation and routing
PULSIC LTD44 citations93
US8751996B1Jun 10, 2014
Automatically routing nets according to parasitic constraint rules
PULSIC LTD19 citations92
US7823113B1Oct 26, 2010
Automatic integrated circuit routing using spines
PULSIC LTD26 citations92
US7802208B1Sep 21, 2010
Design automation using spine routing
PULSIC LTD23 citations92
US7657852B2Feb 2, 2010
System and technique of pattern matching and pattern replacement
PULSIC LTD34 citations92
US7603644B2Oct 13, 2009
Integrated circuit routing and compaction
PULSIC LTD15 citations92
US7530040B1May 5, 2009
Automatically routing nets according to current density rules
PULSIC LTD15 citations92
US8707239B2Apr 22, 2014
Integrated circuit routing with compaction
PULSIC LTD5 citations84
US7373628B1May 13, 2008
Method of automatically routing nets using a Steiner tree
PULSIC LTD13 citations84
US8788999B1Jul 22, 2014
Automatic routing system with variable width interconnect
PULSIC LTD5 citations83
US8010928B1Aug 30, 2011
Automatically routing nets according to parasitic constraint rules
PULSIC LTD5 citations74
US10691858B1Jun 23, 2020
Filing vacant areas of an integrated circuit design
PULSIC LTD1 citations73
US11281828B1Mar 22, 2022
Automated analog layout
PULSIC LTD1 citations71
US11200363B1Dec 14, 2021
Optimizing place-and-routing using a random normalized polish expression
PULSIC LTD2 citations71
US10726184B1Jul 28, 2020
Method for optimizing place-and-routing using a random normalized polish expression
PULSIC LTD3 citations71
US7984411B2Jul 19, 2011
Integrated circuit routing and compaction
PULSIC LTD1 citations63
US11853671B1Dec 26, 2023
Filling vacant areas of an integrated circuit design
PULSIC LTD0 citations62
US11126779B2Sep 21, 2021
High-speed shape-based router
PULSIC LTD0 citations62
US11030374B1Jun 8, 2021
Filling vacant areas of an integrated circuit design
PULSIC LTD0 citations62
US9767242B1Sep 19, 2017
Filling vacant areas of an integrated circuit design
PULSIC LTD1 citations62
US12032893B2Jul 9, 2024
Optimizing place-and-routing using a random normalized polish expression
PULSIC LTD0 citations61
US11748538B1Sep 5, 2023
Automated analog layout
PULSIC LTD0 citations60
US10769343B2Sep 8, 2020
High-speed shape-based router
PULSIC LTD0 citations52
US10346577B2Jul 9, 2019
High-speed shape-based router
PULSIC LTD0 citations52