Assignee
PURI RUCHIR
US·1 granted patent·1 pending application·14 citations·filing 2007–2008
Technology mixG06F2
Top patents by PatentIndex Score
2 records- 0180US8104014B2Regular local clock buffer placement and latch clustering by iterative optimizationPURI RUCHIR·Filed 2008·Granted Jan 24, 2012·14 cites·20 claims
- 0233US2008281572A1Integrated circuit (ic) design method and method of analyzing radiation-induced single-event upsets in cmos logic designsPURI RUCHIR·Filed 2007·Application pending·0 cites
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