Assignee
RABINOVITCH ALEXANDER
IL·9 granted patents·8 pending applications·24 citations·filing 2008–2012
Top patents by PatentIndex Score
17 records- 0183US8806137B2Cache replacement using active cache line countersRABINOVITCH ALEXANDER·Filed 2011·Granted Aug 12, 2014·8 cites·21 claims
- 0276US8706467B2Compact circuit-simulation outputRABINOVITCH ALEXANDER·Filed 2008·Granted Apr 22, 2014·11 cites·21 claims
- 0362US8661169B2Copying data to a cache using direct memory accessRABINOVITCH ALEXANDER·Filed 2010·Granted Feb 25, 2014·1 cites·18 claims
- 0462US8171269B2Branch target buffer with entry source field for use in determining replacement priorityRABINOVITCH ALEXANDER·Filed 2009·Granted May 1, 2012·2 cites·20 claims
- 0561US10423740B2Logic simulation and/or emulation which follows hardware semanticsRABINOVITCH ALEXANDER·Filed 2009·Granted Sep 24, 2019·2 cites·22 claims
- 0647US8656107B2On-demand allocation of cache memory for use as a preset bufferRABINOVITCH ALEXANDER·Filed 2012·Granted Feb 18, 2014·0 cites·21 claims
- 0746US9066068B2Intra-prediction mode selection while encoding a pictureRABINOVITCH ALEXANDER·Filed 2011·Granted Jun 23, 2015·0 cites·16 claims
- 0846US8898433B2Efficient extraction of execution sets from fetch setsRABINOVITCH ALEXANDER·Filed 2012·Granted Nov 25, 2014·0 cites·20 claims
- 0941US2013305017A1Compiled control code parallelization by hardware treatment of data dependencyRABINOVITCH ALEXANDER·Filed 2012·Application pending·0 cites
- 1041US2013298129A1Controlling a sequence of parallel executionsRABINOVITCH ALEXANDER·Filed 2012·Application pending·0 cites
- 1141US2013117532A1Interleaving address modificationRABINOVITCH ALEXANDER·Filed 2011·Application pending·0 cites
- 1240US8798129B2Biquad infinite impulse response system transformationRABINOVITCH ALEXANDER·Filed 2012·Granted Aug 5, 2014·0 cites·21 claims
- 1340US2013080741A1Hardware control of instruction operands in a processorRABINOVITCH ALEXANDER·Filed 2011·Application pending·0 cites
- 1439US2012324195A1Allocation of preset cache linesRABINOVITCH ALEXANDER·Filed 2011·Application pending·0 cites
- 1539US2012151150A1Cache Line Fetching and Fetch Ahead Control Using Post Modification InformationRABINOVITCH ALEXANDER·Filed 2010·Application pending·0 cites
- 1637US2013318307A1Memory mapped fetch-ahead control for data cache accessesRABINOVITCH ALEXANDER·Filed 2012·Application pending·0 cites
- 1731US2013046961A1Speculative memory write in a pipelined processorRABINOVITCH ALEXANDER·Filed 2011·Application pending·0 cites
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