Assignee
RYCHLIK BOHUSLAV
US·9 granted patents·1 pending application·89 citations·filing 2005–2012
Top patents by PatentIndex Score
10 records- 0193US8555039B2System and method for using a local condition code register for accelerating conditional instruction execution in a pipeline processorRYCHLIK BOHUSLAV·Filed 2007·Granted Oct 8, 2013·35 cites·24 claims
- 0292US8595014B2Providing audible navigation system direction updates during predetermined time windows so as to minimize impact on conversationsRYCHLIK BOHUSLAV·Filed 2010·Granted Nov 26, 2013·22 cites·20 claims
- 0389US8650426B2System and method for controlling central processing unit power in a virtualized systemRYCHLIK BOHUSLAV·Filed 2010·Granted Feb 11, 2014·15 cites·32 claims
- 0481US8689037B2System and method for asynchronously and independently controlling core clocks in a multicore central processing unitRYCHLIK BOHUSLAV·Filed 2010·Granted Apr 1, 2014·7 cites·4 claims
- 0574US9563250B2System and method for controlling central processing unit power based on inferred workload parallelismRYCHLIK BOHUSLAV·Filed 2010·Granted Feb 7, 2017·4 cites·40 claims
- 0673US9092358B2Memory management unit with pre-filling capabilityRYCHLIK BOHUSLAV·Filed 2012·Granted Jul 28, 2015·4 cites·39 claims
- 0751US8665642B2Pattern-sensitive coding of data for storage in multi-level memory cellsRYCHLIK BOHUSLAV·Filed 2009·Granted Mar 4, 2014·2 cites·34 claims
- 0850US8782383B2System and method for selectively managing a branch target address cache of a multiple-stage predictorRYCHLIK BOHUSLAV·Filed 2011·Granted Jul 15, 2014·0 cites·16 claims
- 0949US8935517B2System and method for selectively managing a branch target address cache of a multiple-stage predictorRYCHLIK BOHUSLAV·Filed 2006·Granted Jan 13, 2015·0 cites·14 claims
- 1042US2006190710A1Suppressing update of a branch history register by loop-ending branchesRYCHLIK BOHUSLAV·Filed 2005·Application pending·0 cites
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