Assignee
SAMACHISA GEORGE
US5 patents
Top patents by PatentIndex Score
US8824183B2Sep 2, 2014
Non-volatile memory having 3D array of read/write elements with vertical bit lines and select devices and methods thereof
SAMACHISA GEORGE161 citations99
US8547720B2Oct 1, 2013
Non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word lines
SAMACHISA GEORGE39 citations94
US8395942B2Mar 12, 2013
Junctionless TFT NAND flash memory
SAMACHISA GEORGE44 citations94
US8625322B2Jan 7, 2014
Non-volatile memory having 3D array of read/write elements with low current structures and methods thereof
SAMACHISA GEORGE31 citations92
US8526237B2Sep 3, 2013
Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereof
SAMACHISA GEORGE8 citations84