Assignee
SHEBANOW MICHAEL C
US5 patents
Top patents by PatentIndex Score
US8860742B2Oct 14, 2014
Coverage caching
SHEBANOW MICHAEL C14 citations83
US8700877B2Apr 15, 2014
Address mapping for a parallel thread processor
SHEBANOW MICHAEL C16 citations83
US8127181B1Feb 28, 2012
Hardware warning protocol for processing units
SHEBANOW MICHAEL C17 citations83
US8522000B2Aug 27, 2013
Trap handler architecture for a parallel processing unit
SHEBANOW MICHAEL C11 citations81
US8458440B2Jun 4, 2013
Deferred complete virtual address computation for local memory space requests
SHEBANOW MICHAEL C1 citations52