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IL8 patents
Top patents by PatentIndex Score
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Vector shuffle instructions operating on multiple lanes each having a plurality of data elements using a same set of per-lane control bits
SPERBER ZEEV22 citations92
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Vector shuffle instructions operating on multiple lanes each having a plurality of data elements using a common set of per-lane control bits
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Gather using index array and finite state machine
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Scatter using index array and finite state machine
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US8103858B2Jan 24, 2012
Efficient parallel floating point exception handling in a processor
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Recoverable parity and residue error
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US8706789B2Apr 22, 2014
Performing reciprocal instructions with high accuracy
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US9092226B2Jul 28, 2015
Efficient parallel floating point exception handling in a processor
SPERBER ZEEV0 citations48