Assignee
STEPHENS JR MICHAEL C
US·19 granted patents·196 citations·filing 2012–2016
Top patents by PatentIndex Score
19 records- 0199US8559258B1Self-refresh adjustment in memory devices configured for stacked arrangementsSTEPHENS JR MICHAEL C·Filed 2012·Granted Oct 15, 2013·53 cites·20 claims
- 0298US8897053B1Signal timing alignment based on a common data strobe in memory devices configured for stacked arrangementsSTEPHENS JR MICHAEL C·Filed 2012·Granted Nov 25, 2014·21 cites·20 claims
- 0398US8659928B1Valid command detection based on stack position identifiers in memory devices configured for stacked arrangementsSTEPHENS JR MICHAEL C·Filed 2012·Granted Feb 25, 2014·20 cites·17 claims
- 0498US8599595B1Memory devices with serially connected signals for stacked arrangementsSTEPHENS JR MICHAEL C·Filed 2012·Granted Dec 3, 2013·21 cites·20 claims
- 0597US8891278B1Stack position determination in memory devices configured for stacked arrangementsSTEPHENS JR MICHAEL C·Filed 2012·Granted Nov 18, 2014·15 cites·20 claims
- 0696US9455001B1Semiconductor memory device having calibration circuitry for dual-gate transistors associated with a memory arraySTEPHENS JR MICHAEL C·Filed 2016·Granted Sep 27, 2016·13 cites·20 claims
- 0796US8681524B1Supply adjustment in memory devices configured for stacked arrangementsSTEPHENS JR MICHAEL C·Filed 2013·Granted Mar 25, 2014·12 cites·20 claims
- 0895US9286955B1Semiconductor memory device having calibration circuitry for dual-gate transistors associated with a memory arraySTEPHENS JR MICHAEL C·Filed 2015·Granted Mar 15, 2016·12 cites·20 claims
- 0992US8743583B1Internal supply redundancy across memory devices configured for stacked arrangementsSTEPHENS JR MICHAEL C·Filed 2013·Granted Jun 3, 2014·5 cites·20 claims
- 1092US8730705B1Serial searching in memory devices configured for stacked arrangementsSTEPHENS JR MICHAEL C·Filed 2012·Granted May 20, 2014·6 cites·20 claims
- 1192US8565029B1Supply adjustment in memory devices configured for stacked arrangementsSTEPHENS JR MICHAEL C·Filed 2012·Granted Oct 22, 2013·6 cites·20 claims
- 1291US8614909B1Internal supply testing in memory devices configured for stacked arrangementsSTEPHENS JR MICHAEL C·Filed 2012·Granted Dec 24, 2013·5 cites·20 claims
- 1387US9153298B2Latency adjustment based on stack position identifier in memory devices configured for stacked arrangementsSTEPHENS JR MICHAEL C·Filed 2012·Granted Oct 6, 2015·3 cites·14 claims
- 1486US8564999B1Pad selection in memory devices configured for stacked arrangementsSTEPHENS JR MICHAEL C·Filed 2012·Granted Oct 22, 2013·3 cites·17 claims
- 1574US9906218B1Dual-gate transistor control based on calibration circuitrySTEPHENS JR MICHAEL C·Filed 2016·Granted Feb 27, 2018·1 cites·20 claims
- 1659US9806708B1Reference level adjustment for calibration of dual-gate transistorsSTEPHENS JR MICHAEL C·Filed 2016·Granted Oct 31, 2017·0 cites·19 claims
- 1756US9344080B1Dual-gate transistor control based on calibration circuitrySTEPHENS JR MICHAEL C·Filed 2015·Granted May 17, 2016·0 cites·20 claims
- 1855US9304525B1Reference level adjustment for calibration of dual-gate transistorsSTEPHENS JR MICHAEL C·Filed 2015·Granted Apr 5, 2016·0 cites·12 claims
- 1950US9601167B1Semiconductor device having dual-gate transistors and calibration circuitrySTEPHENS JR MICHAEL C·Filed 2015·Granted Mar 21, 2017·0 cites·20 claims
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