Assignee
SUNDARESWARAN SAVITHRI
US·4 granted patents·44 citations·filing 2011–2014
Top patents by PatentIndex Score
4 records- 0190US8656331B1Timing margins for on-chip variations from sensitivity dataSUNDARESWARAN SAVITHRI·Filed 2013·Granted Feb 18, 2014·29 cites·20 claims
- 0282US9177096B2Timing closure using transistor sizing in standard cellsSUNDARESWARAN SAVITHRI·Filed 2014·Granted Nov 3, 2015·10 cites·19 claims
- 0376US8612915B1Reducing leakage in standard cellsSUNDARESWARAN SAVITHRI·Filed 2012·Granted Dec 17, 2013·5 cites·20 claims
- 0443US8618838B2Integrated circuit having a standard cell and method for formingSUNDARESWARAN SAVITHRI·Filed 2011·Granted Dec 31, 2013·0 cites·16 claims
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