Assignee
TEKUMALLA RAMESH C
US·14 granted patents·2 pending applications·95 citations·filing 2011–2012
Top patents by PatentIndex Score
16 records- 0197US8788896B2Scan chain lockup latch with data input control responsive to scan enable signalTEKUMALLA RAMESH C·Filed 2012·Granted Jul 22, 2014·31 cites·18 claims
- 0291US8904255B2Integrated circuit having clock gating circuitry responsive to scan shift control signalTEKUMALLA RAMESH C·Filed 2012·Granted Dec 2, 2014·11 cites·19 claims
- 0387US8700962B2Scan test circuitry configured to prevent capture of potentially non-deterministic valuesTEKUMALLA RAMESH C·Filed 2012·Granted Apr 15, 2014·7 cites·20 claims
- 0487US8671320B2Integrated circuit comprising scan test circuitry with controllable number of capture pulsesTEKUMALLA RAMESH C·Filed 2011·Granted Mar 11, 2014·7 cites·20 claims
- 0587US8645778B2Scan test circuitry with delay defect bypass functionalityTEKUMALLA RAMESH C·Filed 2011·Granted Feb 4, 2014·7 cites·20 claims
- 0685US8850280B2Scan enable timing control for testing of scan cellsTEKUMALLA RAMESH C·Filed 2011·Granted Sep 30, 2014·6 cites·24 claims
- 0784US8726108B2Scan test circuitry configured for bypassing selected segments of a multi-segment scan chainTEKUMALLA RAMESH C·Filed 2012·Granted May 13, 2014·7 cites·20 claims
- 0882US8566658B2Low-power and area-efficient scan cell for integrated circuit testingTEKUMALLA RAMESH C·Filed 2011·Granted Oct 22, 2013·6 cites·22 claims
- 0977US8812921B2Dynamic clock domain bypass for scan chainsTEKUMALLA RAMESH C·Filed 2011·Granted Aug 19, 2014·4 cites·18 claims
- 1075US8738978B2Efficient wrapper cell design for scan testing of integratedTEKUMALLA RAMESH C·Filed 2011·Granted May 27, 2014·4 cites·20 claims
- 1171US8751884B2Scan test circuitry with selectable transition launch modeTEKUMALLA RAMESH C·Filed 2012·Granted Jun 10, 2014·2 cites·20 claims
- 1266US8793546B2Integrated circuit comprising scan test circuitry with parallel reordered scan chainsTEKUMALLA RAMESH C·Filed 2011·Granted Jul 29, 2014·2 cites·15 claims
- 1363US8615693B2Scan test circuitry comprising scan cells with multiple scan inputsTEKUMALLA RAMESH C·Filed 2011·Granted Dec 24, 2013·1 cites·20 claims
- 1449US8677200B2Integrated circuit with transition control circuitry for limiting scan test signal transitions during scan testingTEKUMALLA RAMESH C·Filed 2011·Granted Mar 18, 2014·0 cites·20 claims
- 1538US2013311843A1Scan controller configured to control signal values applied to signal lines of circuit core input interfaceTEKUMALLA RAMESH C·Filed 2012·Application pending·0 cites
- 1632US2013275824A1Scan-based capture and shift of interface functional signal values in conjunction with built-in self-testTEKUMALLA RAMESH C·Filed 2012·Application pending·0 cites
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