Assignee
TILERA CORP
US·29 granted patents·1,785 citations·filing 2005–2015
Top patents by PatentIndex Score
29 records- 0199US7882307B1Managing cache memory in a parallel processing environmentTILERA CORP·Filed 2006·Granted Feb 1, 2011·132 cites·39 claims
- 0299US7805575B1Caching in multicore and multiprocessor architecturesTILERA CORP·Filed 2007·Granted Sep 28, 2010·139 cites·81 claims
- 0399US7461236B1Transferring data in a parallel processing environmentTILERA CORP·Filed 2005·Granted Dec 2, 2008·178 cites·22 claims
- 0498US7853755B1Caching in multicore and multiprocessor architecturesTILERA CORP·Filed 2007·Granted Dec 14, 2010·56 cites·50 claims
- 0598US7805392B1Pattern matching in a multiprocessor environment with finite state automaton transitions based on an order of vectors in a state transition tableTILERA CORP·Filed 2006·Granted Sep 28, 2010·132 cites·77 claims
- 0698US7734894B1Managing data forwarded between processors in a parallel processing environment based on operations associated with instructions issued by the processorsTILERA CORP·Filed 2008·Granted Jun 8, 2010·75 cites·40 claims
- 0798US7577820B1Managing data in a parallel processing environmentTILERA CORP·Filed 2006·Granted Aug 18, 2009·86 cites·24 claims
- 0898US7539845B1Coupling integrated circuits in a parallel processing environmentTILERA CORP·Filed 2006·Granted May 26, 2009·135 cites·18 claims
- 0997US7853752B1Caching in multicore and multiprocessor architecturesTILERA CORP·Filed 2007·Granted Dec 14, 2010·36 cites·20 claims
- 1097US7853774B1Managing buffer storage in a parallel processing environmentTILERA CORP·Filed 2005·Granted Dec 14, 2010·59 cites·20 claims
- 1197US7636835B1Coupling data in a parallel processing environmentTILERA CORP·Filed 2006·Granted Dec 22, 2009·63 cites·16 claims
- 1297US7620791B1Mapping memory in a parallel processing environmentTILERA CORP·Filed 2006·Granted Nov 17, 2009·84 cites·16 claims
- 1397US7461210B1Managing set associative cache memory according to entry typeTILERA CORP·Filed 2006·Granted Dec 2, 2008·82 cites·24 claims
- 1496US10210092B1Managing cache access and streaming dataTILERA CORP·Filed 2015·Granted Feb 19, 2019·16 cites·27 claims
- 1596US8050256B1Configuring routing in mesh networksTILERA CORP·Filed 2008·Granted Nov 1, 2011·132 cites·17 claims
- 1696US7805577B1Managing memory access in a parallel processing environmentTILERA CORP·Filed 2006·Granted Sep 28, 2010·62 cites·44 claims
- 1795US8045546B1Configuring routing in mesh networksTILERA CORP·Filed 2008·Granted Oct 25, 2011·79 cites·9 claims
- 1895US7987321B1Caching in multicore and multiprocessor architecturesTILERA CORP·Filed 2010·Granted Jul 26, 2011·16 cites·47 claims
- 1995US7853754B1Caching in multicore and multiprocessor architecturesTILERA CORP·Filed 2007·Granted Dec 14, 2010·23 cites·33 claims
- 2094US7877401B1Pattern matchingTILERA CORP·Filed 2007·Granted Jan 25, 2011·38 cites·27 claims
- 2194US7774579B1Protection in a parallel processing environment using access information associated with each switch to prevent data from being forwarded outside a plurality of tilesTILERA CORP·Filed 2006·Granted Aug 10, 2010·37 cites·28 claims
- 2292US7793074B1Directing data in a parallel processing environmentTILERA CORP·Filed 2006·Granted Sep 7, 2010·27 cites·29 claims
- 2392US7624248B1Managing memory in a parallel processing environmentTILERA CORP·Filed 2006·Granted Nov 24, 2009·29 cites·49 claims
- 2491US7668979B1Buffering data in a parallel processing environmentTILERA CORP·Filed 2005·Granted Feb 23, 2010·26 cites·28 claims
- 2590US8018849B1Flow control in a parallel processing environmentTILERA CORP·Filed 2005·Granted Sep 13, 2011·15 cites·13 claims
- 2689US7814242B1Managing data flows in a parallel processing environmentTILERA CORP·Filed 2005·Granted Oct 12, 2010·13 cites·72 claims
- 2779US7552241B2Method and system for managing a plurality of I/O interfaces with an array of multicore processor resources in a semiconductor chipTILERA CORP·Filed 2007·Granted Jun 23, 2009·9 cites·20 claims
- 2877US9424228B2High performance, scalable multi chip interconnectTILERA CORP·Filed 2013·Granted Aug 23, 2016·3 cites·16 claims
- 2959US7673206B2Method and system for routing scan chains in an array of processor resourcesTILERA CORP·Filed 2007·Granted Mar 2, 2010·3 cites·4 claims
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