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FR7 patents

Top patents by PatentIndex Score

US8567051B2Oct 29, 2013

Process for the vertical interconnection of 3D electronic modules by vias

VAL CHRISTIAN28 citations92
US8735220B2May 27, 2014

Method for positioning chips during the production of a reconstituted wafer

VAL CHRISTIAN4 citations72
US8546190B2Oct 1, 2013

Method for positioning chips during the production of a reconstituted wafer

VAL CHRISTIAN4 citations62
US8243468B2Aug 14, 2012

Low-thickness electronic module comprising a stack of electronic packages provided with connection balls

VAL CHRISTIAN2 citations62
US8136237B2Mar 20, 2012

Method of interconnecting electronic wafers

VAL CHRISTIAN4 citations62
US9111688B2Aug 18, 2015

Method for producing reconstituted wafers with support of the chips during their encapsulation

VAL CHRISTIAN1 citations51
US8264853B2Sep 11, 2012

3D electronic module

VAL CHRISTIAN0 citations39