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VERISITY LTD
US12 patents
Top patents by PatentIndex Score
US6182258B1Jan 30, 2001
Method and apparatus for test generation during circuit design
VERISITY LTD240 citations97
US6530054B2Mar 4, 2003
Method and apparatus for test generation during circuit design
VERISITY LTD82 citations96
US6347388B1Feb 12, 2002
Method and apparatus for test generation during circuit design
VERISITY LTD94 citations96
US6684359B2Jan 27, 2004
System and method for test generation with dynamic constraints using static analysis
VERISITY LTD56 citations94
US6675138B1Jan 6, 2004
System and method for measuring temporal coverage detection
VERISITY LTD60 citations91
US6519727B2Feb 11, 2003
System and method for applying flexible constraints
VERISITY LTD18 citations90
US6219809B1Apr 17, 2001
System and method for applying flexible constraints
VERISITY LTD28 citations90
US6920583B1Jul 19, 2005
System and method for compiling temporal expressions
VERISITY LTD32 citations89
US6907599B1Jun 14, 2005
Synthesis of verification languages
VERISITY LTD29 citations89
US6499132B1Dec 24, 2002
System and method for analyzing temporal expressions
VERISITY LTD47 citations89
US7284177B2Oct 16, 2007
Method and apparatus for functionally verifying a physical device under test
VERISITY LTD28 citations80
US6918076B2Jul 12, 2005
Method for providing bitwise constraints for test generation
VERISITY LTD9 citations64