Assignee
VISHAY SILICONIX
US70 patents
Top patents by PatentIndex Score
US7005347B1Feb 28, 2006
Structures of and methods of fabricating trench-gated MIS devices
VISHAY SILICONIX74 citations97
US7335946B1Feb 26, 2008
Structures of and methods of fabricating trench-gated MIS devices
VISHAY SILICONIX43 citations95
US9589929B2Mar 7, 2017
Method for fabricating stack die package
VISHAY SILICONIX28 citations94
US6906380B1Jun 14, 2005
Drain side gate trench metal-oxide-semiconductor field effect transistor
VISHAY SILICONIX65 citations94
US9425304B2Aug 23, 2016
Transistor structure with improved unclamped inductive switching immunity
VISHAY SILICONIX14 citations92
US8367500B1Feb 5, 2013
Method of forming self aligned contacts for a power MOSFET
VISHAY SILICONIX18 citations92
US7833863B1Nov 16, 2010
Method of manufacturing a closed cell trench MOSFET
VISHAY SILICONIX20 citations92
US7544545B2Jun 9, 2009
Trench polysilicon diode
VISHAY SILICONIX27 citations92
US7361558B2Apr 22, 2008
Method of manufacturing a closed cell trench MOSFET
VISHAY SILICONIX19 citations92
US7279743B2Oct 9, 2007
Closed cell trench metal-oxide-semiconductor field effect transistor
VISHAY SILICONIX24 citations92
US7211877B1May 1, 2007
Chip scale surface mount package for semiconductor device and process of fabricating the same
VISHAY SILICONIX19 citations92
US7151036B1Dec 19, 2006
Precision high-frequency capacitor formed on semiconductor substrate
VISHAY SILICONIX15 citations92
US7344945B1Mar 18, 2008
Method of manufacturing a drain side gate trench metal-oxide-semiconductor field effect transistor
VISHAY SILICONIX27 citations91
US7868381B1Jan 11, 2011
Structures of and methods of fabricating trench-gated MIS devices
VISHAY SILICONIX22 citations90
US6552889B1Apr 22, 2003
Current limiting technique for hybrid power MOSFET circuits
VISHAY SILICONIX30 citations89
US7494876B1Feb 24, 2009
Trench-gated MIS device having thick polysilicon insulation layer at trench bottom and method of fabricating the same
VISHAY SILICONIX20 citations86
US9966330B2May 8, 2018
Stack die package
VISHAY SILICONIX8 citations84
US9716166B2Jul 25, 2017
Transistor structure with improved unclamped inductive switching immunity
VISHAY SILICONIX5 citations84
US9064896B2Jun 23, 2015
Transistor structure with feed-through source-to-substrate contact
VISHAY SILICONIX9 citations84
US7960947B2Jun 14, 2011
Adaptive frequency compensation for DC-to-DC converter
VISHAY SILICONIX7 citations84
US7880446B2Feb 1, 2011
Adaptive frequency compensation for DC-to-DC converter
VISHAY SILICONIX9 citations84
US8368126B2Feb 5, 2013
Trench metal oxide semiconductor with recessed trench material and remote contacts
VISHAY SILICONIX11 citations82
US7583485B1Sep 1, 2009
Electrostatic discharge protection circuit for integrated circuits
VISHAY SILICONIX11 citations77
US10546840B2Jan 28, 2020
Method for fabricating stack die package
VISHAY SILICONIX4 citations73
US9882044B2Jan 30, 2018
Edge termination for super-junction MOSFETs
VISHAY SILICONIX2 citations73
US9853140B2Dec 26, 2017
Adaptive charge balanced MOSFET techniques
VISHAY SILICONIX4 citations73
US9508596B2Nov 29, 2016
Processes used in fabricating a metal-insulator-semiconductor field effect transistor
VISHAY SILICONIX5 citations73
US7642164B1Jan 5, 2010
Method of forming self aligned contacts for a power MOSFET
VISHAY SILICONIX7 citations73
US10622994B2Apr 14, 2020
Devices and methods for driving a semiconductor switching device
VISHAY SILICONIX3 citations72
US9673314B2Jun 6, 2017
Semiconductor device with non-uniform trench oxide layer
VISHAY SILICONIX2 citations72
US6858471B1Feb 22, 2005
Semiconductor substrate with trenches for reducing substrate resistance
VISHAY SILICONIX11 citations72
US10527654B2Jan 7, 2020
Vertical sense devices in vertical trench MOSFET
VISHAY SILICONIX1 citations71
US10444262B2Oct 15, 2019
Vertical sense devices in vertical trench MOSFET
VISHAY SILICONIX1 citations71
US10234486B2Mar 19, 2019
Vertical sense devices in vertical trench MOSFET
VISHAY SILICONIX3 citations71
US10229893B2Mar 12, 2019
Dual lead frame semiconductor package and method of manufacture
VISHAY SILICONIX1 citations71
US10224426B2Mar 5, 2019
High-electron-mobility transistor devices
VISHAY SILICONIX2 citations71
US10381473B2Aug 13, 2019
High-electron-mobility transistor with buried interconnect
VISHAY SILICONIX2 citations70
US9793706B2Oct 17, 2017
Current limiting systems and methods
VISHAY SILICONIX2 citations70
US9761696B2Sep 12, 2017
Self-aligned trench MOSFET and method of manufacture
VISHAY SILICONIX3 citations70
US7589396B2Sep 15, 2009
Chip scale surface mount package for semiconductor device and process of fabricating the same
VISHAY SILICONIX4 citations63
US7501086B2Mar 10, 2009
Encapsulation method for leadless semiconductor packages
VISHAY SILICONIX2 citations63
US10229988B2Mar 12, 2019
Adaptive charge balanced edge termination
VISHAY SILICONIX1 citations62
US7612431B2Nov 3, 2009
Trench polysilicon diode
VISHAY SILICONIX2 citations62
US11004841B2May 11, 2021
Semiconductor device having multiple gate pads
VISHAY SILICONIX0 citations61
US10651303B2May 12, 2020
High-electron-mobility transistor devices
VISHAY SILICONIX1 citations61
US10930591B2Feb 23, 2021
Trench MOSFET with self-aligned body contact with spacer
VISHAY SILICONIX0 citations60
US10903163B2Jan 26, 2021
Trench MOSFET with self-aligned body contact with spacer
VISHAY SILICONIX1 citations60
US8697571B2Apr 15, 2014
Power MOSFET contact metallization
VISHAY SILICONIX3 citations60
US10340377B2Jul 2, 2019
Edge termination for super-junction MOSFETs
VISHAY SILICONIX0 citations52
US10181523B2Jan 15, 2019
Transistor structure with improved unclamped inductive switching immunity
VISHAY SILICONIX0 citations52
Showing the top 50 of 70 patents by PatentIndex Score.