Assignee
VRUDHULA SARMA
US·9 granted patents·4 pending applications·64 citations·filing 2013–2025
Top patents by PatentIndex Score
13 records- 0191US9876503B2Method of obfuscating digital logic circuits using threshold voltageVRUDHULA SARMA·Filed 2016·Granted Jan 23, 2018·16 cites·19 claims
- 0290US11356100B2FPGA with reconfigurable threshold logic gates for improved performance, power, and areaVRUDHULA SARMA·Filed 2020·Granted Jun 7, 2022·6 cites·15 claims
- 0388US8832614B2Technology mapping for threshold and logic gate hybrid circuitsVRUDHULA SARMA·Filed 2013·Granted Sep 9, 2014·13 cites·8 claims
- 0487US10447249B2Hold violation free scan chain and scanning mechanism for testing of synchronous digital VLSI circuitsVRUDHULA SARMA·Filed 2016·Granted Oct 15, 2019·4 cites·18 claims
- 0587US9473139B2Threshold logic element with stabilizing feedbackVRUDHULA SARMA·Filed 2015·Granted Oct 18, 2016·7 cites·18 claims
- 0687US9356598B2Threshold logic gates with resistive networksVRUDHULA SARMA·Filed 2015·Granted May 31, 2016·8 cites·20 claims
- 0783US10551869B2Clock skewing strategy to reduce dynamic power and eliminate hold-time violations in synchronous digital VLSI designsVRUDHULA SARMA·Filed 2017·Granted Feb 4, 2020·5 cites·17 claims
- 0881US10250236B2Energy efficient, robust differential mode d-flip-flopVRUDHULA SARMA·Filed 2016·Granted Apr 2, 2019·5 cites·19 claims
- 0979US2026073206A1Computing in memory with artificial neuronsVRUDHULA SARMA·Filed 2025·Application pending·0 cites
- 1066US2023385624A1Computing in memory with artificial neuronsVRUDHULA SARMA·Filed 2023·Application pending·0 cites
- 1165US2024419955A1System and method for in-memory image processingVRUDHULA SARMA·Filed 2024·Application pending·0 cites
- 1263US12327075B2System and method for clock distribution in a digital circuitVRUDHULA SARMA·Filed 2024·Granted Jun 10, 2025·0 cites·19 claims
- 1357US2025322226A1Quantized neural network circuitVRUDHULA SARMA·Filed 2025·Application pending·0 cites
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