Assignee
WAFER LEVEL PACKAGING PORTFOLIO LLC
US·4 granted patents·2 pending applications·22 citations·filing 2007–2011
Top patents by PatentIndex Score
6 records- 0179US8017435B2Method for packaging electronic devices and integrated circuitsWAFER LEVEL PACKAGING PORTFOLIO LLC·Filed 2007·Granted Sep 13, 2011·8 cites·8 claims
- 0277US7858512B2Semiconductor with bottom-side wrap-around flange contactWAFER LEVEL PACKAGING PORTFOLIO LLC·Filed 2008·Granted Dec 28, 2010·7 cites·8 claims
- 0374US8349707B2Process for making contact with and housing integrated circuitsWAFER LEVEL PACKAGING PORTFOLIO LLC·Filed 2010·Granted Jan 8, 2013·3 cites·11 claims
- 0472US7880179B2Process for making contact with and housing integrated circuitsWAFER LEVEL PACKAGING PORTFOLIO LLC·Filed 2009·Granted Feb 1, 2011·4 cites·22 claims
- 0544US2011169171A1Dual Interconnection in Stacked Memory and Controller ModuleWAFER LEVEL PACKAGING PORTFOLIO LLC·Filed 2011·Application pending·0 cites
- 0643US2010327448A1Semiconductor with Bottom-Side Wrap-Around Flange ContactWAFER LEVEL PACKAGING PORTFOLIO LLC·Filed 2010·Application pending·0 cites
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Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →