Assignee
WEI ANDY
DE11 patents
Top patents by PatentIndex Score
US8298885B2Oct 30, 2012
Semiconductor device comprising metal gates and a silicon containing resistor formed on an isolation structure
WEI ANDY35 citations92
US8114746B2Feb 14, 2012
Method for forming double gate and tri-gate transistors on a bulk substrate
WEI ANDY38 citations92
US8679924B2Mar 25, 2014
Self-aligned multiple gate transistor formed on a bulk substrate
WEI ANDY7 citations83
US8652889B2Feb 18, 2014
Fin-transistor formed on a patterned STI region by late fin etch
WEI ANDY8 citations83
US8614123B2Dec 24, 2013
Method of forming a semiconductor device by using sacrificial gate electrodes and sacrificial self-aligned contact structures
WEI ANDY7 citations83
US8390127B2Mar 5, 2013
Contact trenches for enhancing stress transfer in closely spaced transistors
WEI ANDY7 citations83
US9450073B2Sep 20, 2016
SOI transistor having drain and source regions of reduced length and a stressed dielectric material adjacent thereto
WEI ANDY2 citations62
US8497554B2Jul 30, 2013
Semiconductor device comprising metal gate structures formed by a replacement gate approach and efuses including a silicide
WEI ANDY2 citations62
US8440516B2May 14, 2013
Method of forming a field effect transistor
WEI ANDY1 citations52
US9023712B2May 5, 2015
Method for self-aligned removal of a high-K gate dielectric above an STI region
WEI ANDY0 citations51
US8274120B2Sep 25, 2012
Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions
WEI ANDY0 citations51