Assignee
YOSHINO HIRONOBU
JP·1 granted patent·1 pending application·0 citations·filing 2009–2011
Top patents by PatentIndex Score
2 records- 0122US2012065910A1Resistance value calculating method and resistance value calculating deviceYOSHINO HIRONOBU·Filed 2011·Application pending·0 cites
- 0218US8429578B2Method of verifying logic circuit including decoders and apparatus for the sameYOSHINO HIRONOBU·Filed 2009·Granted Apr 23, 2013·0 cites·10 claims
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