Assignee
CAPRIOLI PAUL
US·11 granted patents·4 pending applications·91 citations·filing 2005–2015
Top patents by PatentIndex Score
15 records- 0195US8161273B2Method and apparatus for programmatically rewinding a register inside a transactionCAPRIOLI PAUL·Filed 2008·Granted Apr 17, 2012·54 cites·23 claims
- 0282US9330020B2System, apparatus, and method for transparent page level instruction translationCAPRIOLI PAUL·Filed 2013·Granted May 3, 2016·6 cites·16 claims
- 0381US8484434B2Index generation for cache memoriesCAPRIOLI PAUL·Filed 2012·Granted Jul 9, 2013·5 cites·22 claims
- 0478US8732438B2Anti-prefetch instructionCAPRIOLI PAUL·Filed 2008·Granted May 20, 2014·9 cites·20 claims
- 0575US8151084B2Using address and non-address information for improved index generation for cache memoriesCAPRIOLI PAUL·Filed 2008·Granted Apr 3, 2012·6 cites·22 claims
- 0671US9542191B2Hardware profiling mechanism to enable page level automatic binary translationCAPRIOLI PAUL·Filed 2012·Granted Jan 10, 2017·3 cites·20 claims
- 0767US10387324B2Method, apparatus, and system for efficiently handling multiple virtual address mappings during transactional execution canceling the transactional execution upon conflict between physical addresses of transactional accesses within the transactional executionCAPRIOLI PAUL·Filed 2011·Granted Aug 20, 2019·2 cites·22 claims
- 0866US9652234B2Instruction and logic to control transfer in a partial binary translation systemCAPRIOLI PAUL·Filed 2011·Granted May 16, 2017·2 cites·25 claims
- 0965US9146744B2Store queue having restricted and unrestricted entriesCAPRIOLI PAUL·Filed 2008·Granted Sep 29, 2015·3 cites·18 claims
- 1060US8185692B2Unified cache structure that facilitates accessing translation table entriesCAPRIOLI PAUL·Filed 2009·Granted May 22, 2012·1 cites·20 claims
- 1147US11048516B2Systems, methods, and apparatuses for last branch record support compatible with binary translation and speculative execution using an architectural bit array and a write bit arrayCAPRIOLI PAUL·Filed 2015·Granted Jun 29, 2021·0 cites·14 claims
- 1247US2009234866A1Floating Point Unit and Cryptographic Unit Having a Shared Multiplier TreeCAPRIOLI PAUL·Filed 2008·Application pending·0 cites
- 1344US2007136562A1Decoupling register bypassing from pipeline depthCAPRIOLI PAUL·Filed 2006·Application pending·0 cites
- 1442US2006168432A1Branch prediction accuracy in a processor that supports speculative executionCAPRIOLI PAUL·Filed 2005·Application pending·0 cites
- 1536US2017090927A1Control transfer instructions indicating intent to call or returnCAPRIOLI PAUL·Filed 2015·Application pending·0 cites
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