Assignee

DERTINGER STEPHAN

DE·1 granted patent·11 citations·filing 2011–2011

Technology mixB81B1 H10B1 H10D1 H10W1

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0185US8581405B2Integrated circuit having a semiconductor substrate with barrier layerDERTINGER STEPHAN·Filed 2011·Granted Nov 12, 2013·11 cites·6 claims

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