Assignee
DYER THOMAS W
US·8 granted patents·28 citations·filing 2008–2012
Top patents by PatentIndex Score
8 records- 0192US8889504B2Semiconductor devices having tensile and/or compressive stress and methods of manufacturingDYER THOMAS W·Filed 2012·Granted Nov 18, 2014·9 cites·9 claims
- 0287US8697528B2Method of forming a planar field effect transistor structure with recesses for epitaxially deposited source/drain regionsDYER THOMAS W·Filed 2012·Granted Apr 15, 2014·6 cites·16 claims
- 0381US8896069B2Semiconductor devices having tensile and/or compressive stress and methods of manufacturingDYER THOMAS W·Filed 2012·Granted Nov 25, 2014·3 cites·3 claims
- 0480US8293631B2Semiconductor devices having tensile and/or compressive stress and methods of manufacturingDYER THOMAS W·Filed 2008·Granted Oct 23, 2012·4 cites·10 claims
- 0571US8110464B2SOI protection for buried plate implant and DT bottle ETCHDYER THOMAS W·Filed 2008·Granted Feb 7, 2012·3 cites·13 claims
- 0669US8623673B1Structure and method for detecting defects in BEOL processingDYER THOMAS W·Filed 2012·Granted Jan 7, 2014·2 cites·13 claims
- 0763US8159031B2SOI substrates and SOI devices, and methods for forming the sameDYER THOMAS W·Filed 2010·Granted Apr 17, 2012·1 cites·13 claims
- 0853US8765602B2Doping of copper wiring structures in back end of line processingDYER THOMAS W·Filed 2012·Granted Jul 1, 2014·0 cites·15 claims
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