Assignee
GOEL SANDEEP KUMAR
US·10 granted patents·75 citations·filing 2009–2012
Top patents by PatentIndex Score
10 records- 0197US8561001B1System and method for testing stacked diesGOEL SANDEEP KUMAR·Filed 2012·Granted Oct 15, 2013·35 cites·7 claims
- 0290US8873320B2DRAM repair architecture for wide I/O DRAM based 2.5D/3D system chipsGOEL SANDEEP KUMAR·Filed 2012·Granted Oct 28, 2014·11 cites·20 claims
- 0388US8836363B2Probe card partition schemeGOEL SANDEEP KUMAR·Filed 2011·Granted Sep 16, 2014·6 cites·20 claims
- 0488US8436639B2Circuits and methods for testing through-silicon viasGOEL SANDEEP KUMAR·Filed 2011·Granted May 7, 2013·10 cites·21 claims
- 0585US8566657B2Circuit and method for diagnosing scan chain failuresGOEL SANDEEP KUMAR·Filed 2011·Granted Oct 22, 2013·4 cites·12 claims
- 0668US8914692B2DRAM test architecture for wide I/O DRAM based 2.5D/3D system chipsGOEL SANDEEP KUMAR·Filed 2012·Granted Dec 16, 2014·2 cites·20 claims
- 0764US9704766B2Interposers of 3-dimensional integrated circuit package systems and methods of designing the sameGOEL SANDEEP KUMAR·Filed 2011·Granted Jul 11, 2017·2 cites·20 claims
- 0864US8966419B2System and method for testing stacked diesGOEL SANDEEP KUMAR·Filed 2012·Granted Feb 24, 2015·1 cites·18 claims
- 0963US8566766B2Method for detecting small delay defectsGOEL SANDEEP KUMAR·Filed 2010·Granted Oct 22, 2013·1 cites·21 claims
- 1060US8140923B2Test circuit and method for testing of infant mortality related defectsGOEL SANDEEP KUMAR·Filed 2009·Granted Mar 20, 2012·3 cites·21 claims
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