Assignee
GOWER KEVIN C
US·8 granted patents·1 pending application·97 citations·filing 2007–2010
Top patents by PatentIndex Score
9 records- 0193US8086936B2Performing error correction at a memory device level that is transparent to a memory channelGOWER KEVIN C·Filed 2007·Granted Dec 27, 2011·36 cites·20 claims
- 0289US8082482B2System for performing error correction operations in a memory hub device of a memory moduleGOWER KEVIN C·Filed 2007·Granted Dec 20, 2011·20 cites·22 claims
- 0386US8140936B2System for a combined error correction code and cyclic redundancy check code for a memory channelGOWER KEVIN C·Filed 2008·Granted Mar 20, 2012·17 cites·20 claims
- 0480US8489936B2High reliability memory module with a fault tolerant address and command busGOWER KEVIN C·Filed 2007·Granted Jul 16, 2013·5 cites·21 claims
- 0579US8631271B2Heterogeneous recovery in a redundant memory systemGOWER KEVIN C·Filed 2010·Granted Jan 14, 2014·6 cites·12 claims
- 0677US8635487B2Memory interface having extended strobe burst for write timing calibrationGOWER KEVIN C·Filed 2010·Granted Jan 21, 2014·5 cites·16 claims
- 0775US8856579B2Memory interface having extended strobe burst for read timing calibrationGOWER KEVIN C·Filed 2010·Granted Oct 7, 2014·4 cites·17 claims
- 0871US8296541B2Memory subsystem with positional read data latencyGOWER KEVIN C·Filed 2009·Granted Oct 23, 2012·4 cites·16 claims
- 0946US2010269021A1Method for Performing Error Correction Operations in a Memory Hub Device of a Memory ModuleGOWER KEVIN C·Filed 2007·Application pending·0 cites
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