Assignee
HOU HSIN-MING
TW·6 granted patents·1 pending application·19 citations·filing 2008–2012
Top patents by PatentIndex Score
7 records- 0188US8434030B1Integrated circuit design and fabrication method by way of detecting and scoring hotspotsHOU HSIN-MING·Filed 2012·Granted Apr 30, 2013·16 cites·13 claims
- 0261US9202914B2Semiconductor device and method for fabricating the sameHOU HSIN-MING·Filed 2012·Granted Dec 1, 2015·1 cites·11 claims
- 0359US8965550B2Experiments method for predicting wafer fabrication outcomeHOU HSIN-MING·Filed 2011·Granted Feb 24, 2015·1 cites·9 claims
- 0454US8410571B2Layout of dummy patternsHOU HSIN-MING·Filed 2008·Granted Apr 2, 2013·1 cites·20 claims
- 0544US8643397B2Transistor array for testingHOU HSIN-MING·Filed 2011·Granted Feb 4, 2014·0 cites·11 claims
- 0640US9159809B2Multi-gate transistor deviceHOU HSIN-MING·Filed 2012·Granted Oct 13, 2015·0 cites·19 claims
- 0736US2013061188A1Hierarchical Wafer Yield Predicting Method and Hierarchical Lifetime Predicting MethodHOU HSIN-MING·Filed 2011·Application pending·0 cites
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