Assignee
LERNER RALF
DE·9 granted patents·1 pending application·41 citations·filing 2005–2024
Top patents by PatentIndex Score
10 records- 0192US8278183B2Production of isolation trenches with different sidewall dopingsLERNER RALF·Filed 2008·Granted Oct 2, 2012·32 cites·16 claims
- 0271US8823095B2MOS-power transistors with edge termination with small area requirementLERNER RALF·Filed 2007·Granted Sep 2, 2014·5 cites·6 claims
- 0362US8247884B2Semiconductor structure for fabricating a handle wafer contact in a trench insulated SOI discLERNER RALF·Filed 2008·Granted Aug 21, 2012·2 cites·29 claims
- 0454US2025089276A1Cmos devices for high-voltage applicationsLERNER RALF·Filed 2024·Application pending·0 cites
- 0553US9070768B2DMOS transistor having an increased breakdown voltage and method for productionLERNER RALF·Filed 2010·Granted Jun 30, 2015·2 cites·15 claims
- 0647US8530999B2Semiconductor component with isolation trench intersectionsLERNER RALF·Filed 2009·Granted Sep 10, 2013·0 cites·20 claims
- 0745US8793116B2Method for the construction of vertical power transistors with differing powers by combination of pre-defined part piecesLERNER RALF·Filed 2012·Granted Jul 29, 2014·0 cites·7 claims
- 0844US8921945B2High-voltage power transistor using SOI technologyLERNER RALF·Filed 2009·Granted Dec 30, 2014·0 cites·12 claims
- 0942US8190415B2Method for the construction of vertical power transistors with differing powers by combination of pre-defined part piecesLERNER RALF·Filed 2005·Granted May 29, 2012·0 cites·16 claims
- 1039US8448101B2Layout method for vertical power transistors having a variable channel widthLERNER RALF·Filed 2006·Granted May 21, 2013·0 cites·5 claims
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